MT1389E - Page de test

Transkript

TABLE OF CONTENTS
1.
INTRODUCTION .....................................................................................................4
1.1.
1.2.
1.3.
Purpose ....................................................................................................................................4
Scope .......................................................................................................................................4
General Features .......................................................................................................................4
2.
2.1.
2.2.
GENERAL DESCRIPTION .....................................................................................5
Introduction ..............................................................................................................................5
System Building Blocks...............................................................................................................5
2.2.1.
AK57 Chassis Block Diagrams
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2.2.1.1.
Genaral ...................................................................................................................5
2.2.1.2.
SMPS ......................................................................................................................6
2.2.1.3.
DEFLECTION ...........................................................................................................6
2.2.2.
AK57 Chassis Main Blocks
7
2.2.2.1.
UOC-II (ULTIMATE-ONE-CHIP).................................................................................8
2.2.2.2.
Audio ....................................................................................................................16
2.2.2.3.
External AV I/O .....................................................................................................18
2.2.2.4.
AV Switching .........................................................................................................19
2.2.2.4.1.
MC74VHC4052 ..................................................................................................19
2.2.2.4.2.
NLAST4599 .......................................................................................................21
2.2.2.5.
TUNER..................................................................................................................23
2.2.2.6.
SAW FILTERS ........................................................................................................25
2.2.2.6.1.
K3958M (IF Filter for Video Applications).............................................................25
2.2.2.6.2.
K9656M (IF Filter for Audio Applications) ............................................................25
2.2.2.6.3.
K2966 (IF Filter for Intercarrier Applications).......................................................26
2.2.2.6.4.
K2962 (IF Filter for Intercarrier Applications).......................................................26
2.2.2.6.5.
G1975 (IF Filter for Intercarrier Applications) ......................................................27
2.2.2.7.
SMPS ....................................................................................................................27
2.2.2.7.1.
PRIMARY BLOCK ...............................................................................................27
2.2.2.7.1.1.
SMPS CONTROLLER (NCP1207) ..........................................................................28
2.2.2.7.1.2.
MOSFET............................................................................................................31
2.2.2.7.1.2.1. MTP3N60E ......................................................................................................31
2.2.2.7.1.2.2. MTP6N60E ......................................................................................................32
2.2.2.7.2.
SECONDARY BLOCK...........................................................................................33
2.2.2.7.3.
SMPS Block Diagram ..........................................................................................33
2.2.2.8.
DEFLECTION .........................................................................................................34
2.2.2.8.1.
HORIZANTAL DEFLECTION ................................................................................34
2.2.2.8.2.
MD1803DFX ......................................................................................................34
2.2.2.8.3.
FBT...................................................................................................................36
2.2.2.8.4.
AN15524A (VERTICAL DEFLECTION OUTPUT).....................................................37
2.2.2.9.
CRT BOARD ..........................................................................................................39
2.2.3.
AK57 Chassis Scematics
42
2.2.3.1.
Part1 ....................................................................................................................42
2.2.3.2.
Part2 ....................................................................................................................43
2.2.3.3.
Part3 ....................................................................................................................44
2.2.3.4.
Part4 ....................................................................................................................45
2.2.4.
DVD PLAYER
46
2.2.4.1.
General Description ...............................................................................................46
2.2.4.1.1.
MT1389D ..........................................................................................................46
2.2.4.1.2.
SDRAM Memory Interface ..................................................................................46
2.3.
2.4.
2.2.4.1.3.
Drive Interfaces.................................................................................................47
2.2.4.2.
System Block Diagram and MT1389D Pin Description...............................................47
2.2.4.2.1.
MT1389D Pin Description ...................................................................................47
2.2.4.2.2.
2.1 Sytem Block Diagram ...................................................................................56
2.2.4.3.
Audio Output.........................................................................................................57
2.2.4.4.
Audio DACS...........................................................................................................57
2.2.4.5.
Video Interface......................................................................................................57
2.2.4.6.
Flash Memory........................................................................................................58
2.2.4.7.
Serial Eeprom Memory ...........................................................................................58
2.2.4.8.
Audio Interface Audio Sampling Rate and PLL Component Configuration...................58
2.2.4.9.
Scematics..............................................................................................................58
2.2.4.9.1.
Part1 ................................................................................................................58
2.2.4.9.2.
Part2 ................................................................................................................59
2.2.4.9.3.
Part3 ................................................................................................................60
2.2.4.9.4.
Part4 ................................................................................................................61
2.2.4.9.5.
Part 5 ...............................................................................................................62
AK57 Service Menu ..................................................................................................................64
TUNER SETTINGS....................................................................................................................75
1. Introduction
1.1.
Purpose
This document is prepared for the UOCII TV project and describes the whole system features
and operating principles to be used in hardware design phase.
The document is based on “Device Specification UOCII-Version 1.12” from Philips
Semiconductors.
Prior to hardware design start, all parties involved must agree with the contents of this
document.
1.2.
Scope
The document covers detailed descriptions of 11AK56 chassis system building blocks.
1.3.
General Features
11AK57 is a 90° / 50 Hz. chassis which is capable of driving 14” superflat and 15” realflat CRT’s .
The chassis will have the following main features;
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Remote Control
100 programs
On Screen Display
Mono
Colour Standarts
; PAL, SECAM, NTSC,
Transmission standarts ; B/G, L/L’ I/I’, DK,
Teletext
; One pages,
Multi-standard alignment free PLL tuning,
DVD or DVIX Player
DVB-T option
Europe Scart
Detachable headphone output option,
Front or side or back AV input option,
Back AV output option,
Coaxial output for IDTV/DVB-T
2W (%10 THD),
90-270V 50Hz or 170V-270V 50Hz SMPS
Less than 3W
DVD-Video, DVD R/RW, CD-R/RW, CD-Audio and MP3 Audio, JPEG (Picture CD), Video CD
and its sub formats like CVD, SVCD, DVCD.
2. General Description
2.1.
Introduction
This chapter describes system building blocks and their detailed descriptions.
2.2.
System Building Blocks
2.2.1. AK57 Chassis Block Diagrams
2.2.1.1. Genaral
P2.0_PWM0
73
WP
71,72
EEPROM
I2C
5VSTB
SPDIF
SPDIF-OUT
18,19,
23,24
P2.2_PWM1
6
DVD5V
IF
SECAM
PORT
IF
BLOCK
80
DVD-ON
DVD-CVBS
V1
DVD-SPDIF
V2
16,17
P0.3_ADC0
HORIZANTAL DRIVE
31
42
VOUT
V+
A1
A2
28
AOUT
AUDIO2
IDTV12V
IDTV30V
56,57,58
A3
33
4052
77
IDTV-SPDIF
P2.5_PWM4
MONO
MUTE
MUTE
A12V
P3.1_ADC1
P1.0_INT1
9,39
59,61,66
1
67
5
8V
3V3STB
TV-IR
NC
KEYBOARD
LED
STB
RCA-MONO-IN
3
68
47
53
52
2
51
50
RCA-CVBS-IN
P0.5
P2.1_PWM0
P1.1_T0
P1.3_T1
CVBS1O
74
IRQ
P1.2_INT0
P3.3_ADC3
70
P3.2_ADC2
69
Tx
48
78
RGB
2822M
AUDOUT1
CRT BOARD
BLKIN
P2.4_PWM3
NLAST4599
Rx
RGB
55
AUDEEM
SW2
DVB-T
HEATER
V4
IDTV-CVBS
IDTV-MONO
DEFLECTION
HOR. FB
UOCII
CVBS2
V3
A4
EHT
VERTICAL DRIVE
30
SW1
SW0
DVD-MONO
TUNER
TUN-IF
AGC
22
IDTV30V
8V
5V
33V
12V
B+
P0.6
P2.3_PWM2
5V
76
DVD-IR
DVD3V3
DVD12V
DVD
SW0
33V
75
NLAST4599
B+
12V
RCA IN
DVD12V
A12V
RGB-FB
DVD5V
SC-R
5VSTB
SC-G
3V3STB
SC-B
DVD3V3
SC-CVBS-IN
STB
SMPS
SC-MONO-IN
SC-CVBS-OUT
RCA-MONO-OUT
SC-MONO-OUT
RCA-CVBS-OUT
Scart1
IDTV12
SC-PIN8
RCA OUT
11AK57
GENERAL BLOCK DIAGRAM
2.2.1.2. SMPS
5
220V
50Hz
15
B+
16
2
13
A12V
IDTV12V
14
1
DMAG
2
CONT_INT
VI
12
8
DVD12V
NCP1207
3
4
I_SENSE
GND
VCC
DRIVER
6
8
11
12V
5
10
7
9V
9
6V
STB
2.2.1.3. DEFLECTION
TR.REG
3V3STB
TR.REG
5VSTB
LDO
DVD3V3
LDO
DVD5V
11AK57
SMPS BLOCK DIAGRAM
HORIZONTAL
30KV
HORIZONTAL
DRIVE
FOCUS
SCREEN
Horz.
Yoke
+33V
Lin.
Heater
+9V
+8V
+5V
-14V VERTICAL
+14V VERTICAL
30KV
TRANSISTORS
RGB
DRIVE
VERTICAL
DRIVE
CRT
BOARD
VERTICAL
AMPLIFIER
AN5524A
Heater
G2
FOCUS
VERTICAL
YOKE
2.2.2. AK57 Chassis Main Blocks
AK57 chassis main blocks are;
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UOCII
AUDIO
EXT. AV I/O
AV SWITCHING
TUNER
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Microcontroller + Video Proccessor + Sound Proccessor + IF + Teletext
Audio Amp.,
Scart , AV input, AV output,
4052, 4599
PLL Tuner
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SAW FILTERS
SMPS
DEFLECTION
CRT BOARD
: SMPS Controller, SMT, Bridge Rect., Line Filters
: FBT, HOT, Vertical Amplifier, Line Driver,
: RGB Amp. with transistors,
2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP)
UOCII is composed of microcontroller, video proccessor, sound proccessor and IF blocks.
The various versions of the TDA955X H/N1 series combine the functions of a video processor
together with a microcontroller.The ICs are intended to be used in economy television receivers
with 90 and 110 degree picture tubes.
The ICs have supply voltages of 8V and 3.3V and they are mounted in a QFP 80 envelope.
The features are given in the following feature list.
FEATURES
TV-signal processor
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Multi-standard vision IF circuit with alignment-free PLL demodulator
Internal (switchable) time-constant for the IF-AGC circuit
The QSS and mono FM functionality are both available so that an FM/AM TV receiver can
be built without the use of additional ICs
The mono intercarrier sound circuit has a selective
FM-PLL demodulator which can be switched to the different FM sound frequencies
(4.5/5.5/6.0/6.5 MHz). The quality of this system is such that the external band-pass
filters can be omitted.
The FM-PLL demodulator can be set to centre frequencies of 4.74/5.74 MHz so that a
second sound channel can be demodulated. In such an application it is necessary that an
external bandpass filter is inserted.
The vision IF and mono intercarrier sound circuit can be used for the demodulation of
FM radio signals
Video switch with 2 external CVBS inputs and a CVBS output. One of the CVBS inputs
can be used as Y/C input.
2 external audio inputs. The selection of the various inputs is coupled to the selection of
the CVBS signals
Integrated chrominance trap circuit
Integrated luminance delay line with adjustable delay time
Switchable group delay correction in the CVBS path
Picture improvement features with peaking (with switchable centre frequency,
depeaking, variable positive/negative overshoot ratio and video dependent coring),
dynamic skin tone control and blue-, black- and white stretching
Integrated chroma band-pass filter with switchable centre frequency
Switchable DC transfer ratio for the luminance signal
Only one reference (12 MHz) crystal required for the m-Controller, Teletext- and the
colour decoder
PAL/NTSC or multi-standard colour decoder with automatic search system
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Internal base-band delay line
Indication of the Signal-to-Noise ratio of the incoming CVBS signal
A linear RGB/YUV/YPBPR input with fast blanking for external RGB/YUV sources. The
synchronisation circuit can be connected to the incoming Y signal. The Text/OSD signals
are internally supplied from the
m-Controller/Teletext decoder.
RGB control circuit with ‘Continuous Cathode Calibration’, white point and black level offset adjustment so that the colour temperature of the dark and the light parts of the
screen can be chosen independently.
Contrast reduction possibility during mixed-mode of OSD and Text signals
Adjustable ‘wide blanking’ of the RGB outputs
Horizontal synchronization with two control loops and alignment-free horizontal oscillator
Vertical count-down circuit
Vertical driver optimized for DC-coupled vertical output stages
Horizontal and vertical geometry processing
Horizontal and vertical zoom function for 16 : 9 applications
Horizontal parallelogram and bow correction for large screen picture tubes
Low-power start-up of the horizontal drive circuit
Microcontroller
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80C51 m-controller core standard instruction set and timing
1 ms machine cycle
32 - 128Kx8-bit late programmed ROM
3 - 12Kx8-bit DataRAM (shared between Display, Acquisition and Auxiliary RAM)
Interrupt controller for individual enable/disable with two level priority
Two 16-bit Timer/Counter registers
One 16-bit Timer with 8-bit Pre-scaler
WatchDog timer
Auxiliary RAM page pointer
16-bit Data pointer
Stand-by, Idle and Power Down modes
14 bits PWM for Voltage Synthesis Tuning
8-bit A/D converter with 4 multiplexed inputs
5 PWM (6-bits) outputs for control of TV analogue signals
18 general I/O ports
Data Capture
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Text memory for 1 or 10 pages
In the 10 page versions inventory of transmitted Teletext pages stored in the
Transmitted Page Table (TPT) and Subtitle Page Table (SPT)
Data Capture for US Closed Caption
Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling
(WSS) bit decoding
Automatic selection between 525 WST/625 WST
Automatic selection between 625 WST/VPS on line 16 of VBI
Real-time capture and decoding for WST Teletext in Hardware, to enable optimized mprocessor throughput
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Automatic detection of FASTEXT transmission
Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
Signal quality detector for video and WST/VPS data types
Comprehensive teletext language coverage
Full Field and Vertical Blanking Interval (VBI) data capture of WST data
Display
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Teletext and Enhanced OSD modes
Features of level 1.5 WST and US Close Caption
Serial and Parallel Display Attributes
Single/Double/Quadruple Width and Height for characters
Scrolling of display region
Variable flash rate controlled by software
Enhanced display features including overlining, underlining and italics
Soft colours using CLUT with 4096 colour palette
Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12x13,
12x16 (VxH)]
Fringing (Shadow) selectable from N-S-E-W direction
Fringe colour selectable
Meshing of defined area
Contrast reduction of defined area
Cursor
Special Graphics Characters with two planes, allowing four colours per character
32 software redefinable On-Screen display characters
4 WST Character sets (G0/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic)
G1 Mosaic graphics, Limited G3 Line drawing characters
WST Character sets and Closed Caption Character set in single device
Optional Used ICs at AK57 chassis are TDA9550 H/N1, TDA9551 H/N1, TDA9552 H/N1.
FUNCTIONALOF TDA9550 H/N1
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TV range is 90°
Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable
centre frequency Audio switch
Automatic Volume Levelling
PAL decoder
NTSC decoder
ROM size 32 – 64K
User RAM size 1K
One page teletext
Close Captioning
FUNCTIONALOF TDA9551H
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TV range is 90°
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PAL decoder
SECAM decoder
NTSC decoder
ROM size 32 – 64K
User RAM size 1K
One page teletext
Close Captioning
FUNCTIONALOF TDA9552H
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TV range is 90°
QSS sound IF amplifier with separate input and AGC circuit
AM sound demodulator without extra reference circuit
PAL decoder
SECAM decoder
NTSC decoder
ROM size 32 – 64K
User RAM size 1K
One page teletext
Close Captioning
BLOCK DIAGRAM
PINING
2.2.2.2. Audio
The TDA2822 is DUAL LOW-VOLTAGE POWER AMPLIFIER.
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Supply voltage down to 1.8V
Low crossover distorsion
Low quıescent current
Bridge or stereo configuration
ELECTRICALCHARACTERISTICS
Figure: Test Circuit (Stereo)
Figure: Test Circuit (Bridge)
Figure: Application in 11AK56
2.2.2.3. External AV I/O
SCART PINING
1. Audio right output
2. Audio right input
3. Audio left output
4. Ground AF
5. Ground Blue
6. Audio left input
7. Blue input
8. AV switching input
9. Ground Green
10. Not Used
11. Green input
12. Not Used
13. Ground Red
14. Ground Blanking
15. Red input
16. Blanking input
17. Ground CVBS output
18. Ground CVBS input
19. CVBS output
20. CVBS input
21. Ground
Front/Side/Back AV Input
0.5Vrms / 1KΩ
0.5Vrms / 10KΩ
0.5Vrms / 1KΩ
0.5Vrms / 10KΩ
0.7Vpp / 75Ω
0-12VDC /10KΩ
0.7Vpp / 75Ω
0.7Vpp / 75Ω
0-0.4VDC, 1-3VDC / 75Ω
1Vpp / 75Ω
1Vpp / 75Ω
Audio
Video
0.5Vrms / 10KΩ
1Vpp / 75Ω
Back AV Output
Audio
Video
0.5Vrms / 1KΩ
1Vpp / 75Ω
2.2.2.4. AV Switching
2.2.2.4.1.
MC74VHC4052
The MC74VHC4052 utilize silicon--gate CMOS technology to achieve fast propagation delays,
low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers
control analog voltages that may vary across the complete power supply range (from VCC to
VEE).
The Channel--Select and Enable inputs are compatible with standard CMOS outputs; with pullup
resistors they are compatible with LSTTL outputs.
These devices have been designed so that the ON resistance (Ron) is more linear over input
voltage than Ron of metal--gate CMOS analog switches.
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Fast Switching and Propagation Speeds
Low Crosstalk Between Switches
Diode Protection on All Inputs/Outputs
Analog Power Supply Range (VCC -- VEE) = 2.0 to 12.0 V
Digital (Control) Power Supply Range (VCC -- GND) = 2.0 to 6.0 V
Improved Linearity and Lower ON Resistance Than Metal—Gate Counterparts
Low Noise
2.2.2.4.2.
NLAST4599
The NLAST4599 is an advanced high speed CMOS single pole − double throw analog switch
fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and
low ON resistances while maintaining low power dissipation. This switch controls analog and
digital voltages that may vary across the full power−supply range (from VCC to GND).
The device has been designed so the ON resistance (RON) is much lower and more linear over
input voltage than RON of typical CMOS analog switches.
The channel select input structure provides protection when voltages between 0 V and 5.5 V are
applied, regardless of the supply voltage. This input structure helps prevent device destruction
caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.
Features
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Select Pin Compatible with TTL Levels
Channel Select Input Over−Voltage Tolerant to 5.5 V
Fast Switching and Propagation Speeds
Break−Before−Make Circuitry
Low Power Dissipation: ICC = 2 _A (Max) at TA = 25°C
Diode Protection Provided on Channel Select Input
Improved Linearity and Lower ON Resistance over Input Voltage
Latch−up Performance Exceeds 300 mA
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ESD Performance: HBM > 2000 V; MM > 200 V
Chip Complexity: 38 FETs
Pb−Free Packages are Available
2.2.2.5. TUNER
Channel coverage of PLLTuner for VHF/UHF
OFF-AIR CHANNELS
BAND
FREQUENCY
CHANNELS RANGE (MHz)
CABLE CHANNELS
CHANNELS
FREQUENCY
RANGE (MHz)
Low Band
E2 to C
48.25 to 82.25 (1)
S01 to S08
69.25 to 154.25
Mid Band
E5 to E12
175.25 to 224.25
S09 to S38
161.25 to 439.25
High Band
E21 to E69
471.25 to 855.25 (2)
S39 to S41
447.25 to 463.25
(1). Enough margin is available to tune down to 45.25 MHz.
(2). Enough margin is available to tune up to 863.25 MHz.
Noise
Low band :
Mid band :
High band :
Typical Max.
5dB
9dB
5dB
9dB
6dB
9dB
Gain
Min. Typical Max.
All channels
: 38dB 44dB
52dB
Gain Taper (of-air channels):
8dB
Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all
channels.
Terminals for External Connection
Electrical conditions
2.2.2.6. SAW FILTERS
2.2.2.6.1.
K3958M (IF Filter for Video Applications)
Standard
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B/G
D/K
I
L/L’
Pin configuration
1 Input
2 Input - ground
3 Chip carrier - ground
4 Output
5 Output
Features
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TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz
Constant group delay
2.2.2.6.2.
Standard
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B/G
D/K
I
L/L’
Pin configuration
K9656M (IF Filter for Audio Applications)
1
2
3
4
5
Input
Input - ground
Chip carrier - ground
Output
Output
Features
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TV IF audio filter with two channels
Channel 1 (L’) with one pass band for sound carriers at 40,40 MHz (L’) and 39,75 MHz
(L’- NICAM)
Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32,35 MHz
and 33,40 MHz
2.2.2.6.3.
K2966 (IF Filter for Intercarrier Applications)
Standard
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B/G
D/K
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
Features
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TV IF filter with Nyquist slope and sound shelf
Broad sound shelf for sound carriers at 32,40MHz and 33,40 MHz
Group delay predistortion
2.2.2.6.4.
Standard
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B/G
I
L/L’
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
K2962 (IF Filter for Intercarrier Applications)
Features
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TV IF filter with two Nyquist slope and sound shelf
Picture carriers at 33,90 MHz and 38,90 MHz
Broad sound shelf at 15 dB level for sound carriers at 32,90 MHz and 33,40 MHz
Constant group delay
2.2.2.6.5.
G1975 (IF Filter for Intercarrier Applications)
Standard
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B/G
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
Features
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TV IF filter with Nyquist slope and sound shelf
Picture carrier at 38.90MHz
Reduced group delay predistortion as compared with standard B/G, half
2.2.2.7. SMPS
2.2.2.7.1.
PRIMARY BLOCK
AC power applied via AC inlet, line filter components prevent chassis from incoming noise of AC
line, also prevents AC line against created noises by TV. Bridge rectifier and bulk capacitor
converts AC voltage to DC voltage. Applied DC voltage to primary winding is then swicthed via
MOSFET by primary controller in a controlled manner.
SMPS controller works on quasi-resonant PWM and gets first supply voltage from AC line (SMPS
Controller supply). Controller drives MOSFET according to feedback information supplied by
shunt regulator and opto-coupler, according to that information adjusts on-time of MOSFET for
required power. After the start-up in normal operation mode SMPS controller is supplied by SMT.
Primary block consist of following main parts,
AC Inlet (PL800),
Fuse (F800),
Varistor (R803),
Line Filter For EMC (C801,L800,C800),
SMPS Controller (IC806),
SMPS Controller supply for first Start-up (R807),
Bridge Rectifier (D820,D821,D822,D823),
Rectifier For SMPS Controller(D803),
Bulk Cap (C809),
Clamping Circuitry (R820, C810, C811, D824),
SMT (Switch Mode Transformer) (TR800),
SMT Driver MOSFET (Q802),
Current Sense Resistor (R828),
Protection Components for MOSFET Failure (D805,D806,R826)
2.2.2.7.1.1.
SMPS CONTROLLER (NCP1207)
PWM Current-Mode Controller for Free Running Quasi-Resonant Operation
The NCP1207A combines a true current mode modulator and a demagnetization detector to
ensure full borderline/critical Conduction Mode in any load/line conditions and minimum drain
voltage switching (Quasi−Resonant operation). Due to its inherent skip cycle capability, the
controller enters burst mode as soon as the power demand falls below a predetermined level. As
this happens at low peak current, no audible noise can be heard. An internal 8.0 _s timer
prevents the free−run frequency to exceed 100 kHz (therefore below the 150 kHz CISPR−22
EMI starting limit), while the skip adjustment capability lets the user select the frequency at
which the burst foldback takes place.
The Dynamic Self−Supply (DSS) drastically simplifies the transformer design in avoiding the use
of an auxiliary winding to supply the NCP1207A. This feature is particularly useful in applications
where the output voltage varies during operation (e.g. battery chargers). Due to its
high−voltage technology, the IC is directly connected to the high−voltage DC rail. As a result,
the short−circuit trip point is not dependent upon any VCC auxiliary level.
The transformer core reset detection is done through an auxiliary winding which, brought via a
dedicated pin, also enables fast Overvoltage Protection (OVP). Once an OVP has been detected,
the IC permanently latches off.
Finally, the continuous feedback signal monitoring implemented with an overcurrent fault
protection circuitry (OCP) makes the final design rugged and reliable.
Features
• Free−Running Borderline/Critical Mode Quasi−Resonant Operation
• Current−Mode with Adjustable Skip−Cycle Capability
• No Auxiliary Winding VCC Operation
• Auto−Recovery Overcurrent Protection
• Latching Overvoltage Protection
• External Latch Triggering, e.g. Via Overtemperature Signal
• 500 mA Peak Current Source/Sink Capability
• Undervoltage Lockout for VCC Below 10 V
• Internal 1.0 ms Soft−Start
• Internal 8.0 _s Minimum TOFF
• Adjustable Skip Level
• Internal Temperature Shutdown
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
• Pb−Free Package is Available Typical Applications
• AC/DC Adapters for Notebooks, etc.
• Offline Battery Chargers
• Consumer Electronics (DVD Players, Set−Top Boxes, TVs, etc.)
• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
Typical Application:
Internal Circuit Architecture
2.2.2.7.1.2.
MOSFET
The MTP3N60E used for voltage range 170-270V, The MTP6N60E used for voltage range 90 –
270V.
2.2.2.7.1.2.1.
MTP3N60E
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to with stand high energy in the
avalanche mode and switch efficiently. This new high energy device also offers a drain–to–
source diode with fast recovery time. Designed for high voltage, high speed switching
applications such as power supplies, PWM motor controls and other inductive loads, the
avalanche energy capability is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against unexpected voltage transients.
Avalanche Energy Capability Specified at Elevated Temperature
Low Stored Gate Charge for Efficient Switching
Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor —
Absorbs High Energy in the Avalanche Mode
Source–to–Drain Diode Recovery Time Comparable to Discrete Fast Recovery Diode
2.2.2.7.1.2.2.
MTP6N60E
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination scheme to provide enhanced
voltage–blocking capability without degrading performance over time. In addition, this advanced
TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes.
The new energy efficient design also offers a drain–to–source diode with a fast recovery time.
Designed for high voltage, high speed switching applications in power supplies, converters and
PWM motor controls, these devices are particularly well suited for bridge circuits where diode
speed and commutating safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
•
•
•
•
•
Robust High Voltage Termination
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
2.2.2.7.2.
SECONDARY BLOCK
Switching primary winding of SMT induces voltages to secondary windings of SMT. Induced
voltages are then rectified by secondary recitification diodes and capacitors.
Output Voltages
+3.3.V_STB : The signal is +3.3VDC and continuous stand-by on/off. Used for digital part of
UOCII.
+5V_STB : The signal is +5VDC and continuos stand-by on/off. Used for port control.
B+ : The voltage needed for FBT. Voltage range 114V – 117V according to CRT.
12V : The voltage needed for horizantal driver circuit.
12V_A : The voltage supply of audio amplifier.
12V_DVD : The voltage needed for DVD.
12V_IDTV : The voltage needed for IDTV.
+5V_DVD : The voltage needed for DVD.
+3.3.V_DVD : The voltage needed for DVD.
2.2.2.7.3.
SMPS Block Diagram
5
220V
50Hz
15
B+
16
2
13
A12V
IDTV12V
14
1
DMAG
2
CONT_INT
VI
12
8
DVD12V
NCP1207
3
I_SENSE
4
GND
VCC
DRIVER
6
8
11
12V
5
10
7
9V
9
6V
STB
TR.REG
3V3STB
TR.REG
5VSTB
LDO
DVD3V3
LDO
DVD5V
11AK57
SMPS BLOCK DIAGRAM
2.2.2.8. DEFLECTION
2.2.2.8.1.
HORIZANTAL DEFLECTION
Deflection block consist of following main parts,
Horizontal driver transistor (Q600),
Horizontal driver (L600),
HOT (Horizontal Output Transistor) (Q603),
FBT (TR600),
Linearity Coil (L601),
Flyback Capacitors (C611),
S-correction capacitor (C622),
Modulated S-correction capacitor (C623),
Hdrive signal is buffered and applied to line driver transistor by a capacitor.
Line driver produces necessary base currents, parallel diode to base series resistor speeds up
the reverse base current.
UOCII has soft-start and soft-stop features to have more safe operation. There are two base
current adjustment resistors on the circuit. Collector current differs according to CRT sizes .
Tube dependent components are choosen to fit best picture performance by keeping;
11-12usec. Flyback time,
Max. 1300V. collector voltage (peak-detect mode measurement)
2.2.2.8.2.
MD1803DFX
HIGH VOLTAGE NPN POWER TRANSISTOR FOR STANDARD DEFINITION CRT DISPLAY
Features
•
•
•
•
•
•
•
State-Of-The-Art Technology: – Diffused collector “ENHANCED GENERATION”
More stable performance versus operating temperature variation
Low base drive requirement
Tighter hFE range at operating collector current
Fully insulated power package U.L. compliant
Integrated free wheeling diode
In compliance eith the 2002/93/EC EUROPEAN DIRECTIVE
2.2.2.8.3.
FBT
Operating Ampient Temperatue : -10°C..........+60°C
Stroge Ampient Temperature
: -20°C..........+80°C
Operating Horizantal Frequency : 15.625KHz ±0.5KHz
INDUCTANCE (Between pin1 to pin3) : 3.02mH ± %8
INTERNAL RESISTANCE : Max. 2.2Ohm Regulation:Max.%10
FLYBACK TIME : 11.5µsec
COLLECTOR VOLTAGE : 1000Vp_p
FOCUS VOLTAGE RANGE % OF EHT: min.≤18.2 max.≥34.6
DEFLECTION CURRENT : 3.1Ap_p max.
AUXLIARY OUTPUTS:
Heater Voltage : 6.3Vrms / max 750mA
RGB Supply : +200V / max 30mA ±%5
Vertical Supply : +14V / max 1A ±%5
Vertical Supply : -14V / max 1A ±%5
Auxliary Voltage : +9V / max 1A ±%5
Tuning Voltage : +33V max 100mA ±%5
2.2.2.8.4.
AN15524A (VERTICAL DEFLECTION OUTPUT)
The AN5524A (TV vertical deflection output circuit) is a monolithic integrated circuit designed for
vertical deflection output, such as TV and display.
Features
•
•
•
•
•
Built-in Pump-up circuit
Built-in Thermal protection circuit
Maximum deflection current = 1.6Ap-p
Dimple forming type :
Advantages : a) Withstand repeated movements between the body and the solder joint of the IC
(when a heat-sink is used).
b) Better vibration absorber (eg. CTV installed in the bus/coach).
VCC operating range : 12V ~ 30V
2.2.2.9. CRT BOARD
Transistors are used for amplifying RGB signals.
2SC2482 For High Voltage Switching And Amplifier Applications:
•
•
High Voltage
: V(BR)=300V.
Small Collector Output Capacitance : Cob=3.0pF (typ.)
2.2.3. AK57 Chassis Scematics
2.2.3.1. Part1
SC_FBLK
SC_R_IN
SC_G_IN
VPROT
5
4
3
2
1
1N4148
SEL_CVBS
CVBS_OUT
2
5
SW1
SW0
R155
100R
AUDIO3 29
C171
Q119
100R
R203
BC848B
AUDIO2 28
10k
SEL_MONO
REFOUT_SNDIF 27
78 P2.5_PWM4
SNDPLL 26
1
+5V
4
5
2
R247
10k
SAW_SW
R248
10k
R209
1k2
1k2
+5V
BC858B
Q113
10n
25V
SC_A_OUT
SC_A_IN
SC_B_IN
SC_STATUS
SC_G_IN
SC_R_IN
SC_FBLK
D109
21
1
3
2
4
17
R252
330R
50V
R240
9
L123
75R
ESD_20V
L121
R236
10k
D114
33V
D106
100R
R237
50V
11
ESD_20V
4n7
50V
D115
C198
150p
100p
ESD_20V
13
75R
D113
R239
D112
ESD_20V
R232
15
C197
C196
R234
50V
100R
150p
50V
7
5
3
1
5
20
RACK_RCA_DVB
JK101
R238
1k
R235
3k3
19
C195
150p
18
16
14
12
10
8
6
4
2
PL119
1
A
SPDIF_OUT
R183
47R
ESD_20V
R230
C166
C191
100R
R227
D111
SC_V_IN
R229
100R
ESD_20V
R212
75R
D124
100R
SC_A_OUT
R214
330R
S103
RF_MONO
75R
R228
4
B5V1_SOD123
IN1
D125
GND
5
ESD_20V
3
OUT
D110
VSS
L117
2
Q112
BC848B
RCA_JACK_1P_90_LONG
JK100
BLM21A601S
47p
50V
PL113
RACK_RCA_DVB
JK102
1
3
D116
ESD_20V
ESD_20V
D117
180R
R222
HOUT
820p
50V
C179
1k
R211
SEL_MONO
SC_A_OUT
D119
220n
16V
C182
6
C134
SW1
16V
10u
9
IN2
NLAST4599
SW0
ESD_20V
B
SW
2
BLM21A601S
A 10
1
SW2
L114
SC_A_IN
1n
50V
R121
10k
C167
C127
X3 11
C188
IDTV_SPDIF
IC105
L112
GND
4
SEL_MONO
+5V
8
IN1
Q114
BC848B
R120
10k
Q117
BC848B
R193
220R
VEE
GND
S104
7
INH
3
+5V_SPDIF
6
C126
50V
4u7
R191
100R
CVBS_OUT
R213
75R
IDTV_MONO
100n
25V
SPDIF_OUT
R192
10k
X0 12
5
3k3
R182
Y1
OUT
R172
300R
5
50V
4u7
VSS
C183
47u
16V
+5V
M74HC4052
2
BLM21A601S
+5V_SPDIF
Q106
BC848B
DVD_SPDIF
R170
300R
R122
47R
COM_X_OUT_IN 13
+5V
6
NLAST4599
L111
DVD_MONO
IN2
470R
R181
R119
10k
SW
S100
C125
X1 14
1
SW0
C133
R118
10k
16V
10u
C124
50V
4u7
ESD_20V
R107
150R
100n
25V
C117
3
1k
R208
R206
470R
IF2
IF1
R207
R190
22R
+8V
2k2
R133
Y3
IC104
RCA_A_IN
R194
100R
10u
50V
150R
R135
COM_Y_OUT_IN
50V
100n 16V
4u7
C203
X2 15
+8V
Y2
4
DVD_CVBS
IN2
D105
+5V
10R
R134
2
C122BLM21A601S
C116
SC_V_IN
R210
VERT-
OPTIONAL
1k
10k
R132
VCC 16
D118
R108
10k
R109
2k2
SEL_CVBS
Y0
3
BC848B
1
2
BA591
VERT+
+5V
R106
10R
Q102
BC848B
2
1N4148
L107
1
100n
25V
R110
47R
OUT2 5
GND
OUT1 4
10n
R251
100R
S102
1
2
IDTV_SPDIF
Q116
50V
R250
100R
L116
100n
25V
C115
RCA_V_IN
3
DVD_SPDIF
D104
ESD_20V
C114
IDTV_CVBS
4n7
50V
10n
50V
C164
C165
D120
IC101
2k2
R200
C180
23 IC
24 IC1
3
OUT2 5
GND
IN2
S101
R180
100R
1n5 50V
2
C162
Z100
K3958M
50V
OUT1 4
16V
IN1
2u2
50V
1
50V
100n
100R
L113
100n
16V
C144
C143
R167
10k
R165
4k3
C153
1u
C156
4R7
4R7
25V
100n
C113
10n
25V
1n5
C154
+8V
4
C161
4n7
50V
+5V_STB
GND
100n
25V
IN21
C121
C123
5
R116
5k6
R103
BC848B
R117
Q100
C108
22u
50V
2
10u
IN1
C151
R163
4k7
3
1
50V
1
PL108 PL109
R189
+12V_A
TDA2822M
OUT2
R249
1k
DVD_MONO
COMMON
LED
SAW_SW
IN22
1
L120
C181
R179
15k
2
1
2
AGC
100n
25V
6
SUPPLY_VOLT
2
50V
10u
1N4148
C112
R113
1k
R104
5k6
IN11
C120
7
2
R246
1k
IDTV_MONO
SC_STATUS
BLM21A601S
10n
50V
10n
50V
C107
6n8
50V
C106
C111
10k
KEYBOARD
BLM21A601S
L106
50V
R105
4u7
50V
MUTE
1
10u
AUDIO_OUT
D100
OUT1
22 AGCOUT
21 VSC
20 IREF
19 IFIN2
18 IFIN1
17 VDRA
16 VDRB
R187
39k
4u7
C155
50V
15 AVL
14 DECBG
13 GND3
12 PF1LF
11 PH2LF
63V
C150
C149
2n2
50V
VP2
9
VSSA
7
10 DECDIG
P0.6
6
R169
100R
220n
P0.5
5
R168
100R
63V
VSSC_P
4
DEC
P3.3_ADC3
3
8
P3.2_ADC2
2
R166
100R
220n
P3.1_ADC1
1
R153
4k7
R151
4k7
R150
4k7
R149
1k
ESD_20V
D123
ESD_20V
R152
4k7
R164
100R
C152
C163
100n
63V
3
L105
IN12
1
+5V_STB
BLM21A601S
R205
1k
A
D122
S105
+3V3_STB
R188
75R
B
ESD_20V
IC102
2k7
R224
C
D121
GND2 25
80 P3.0_ADC0
6
C109
R215
L119
8
2
R204
DVD_ON
1
3
IDTV_CVBS
5
PL100
220R
R221
RF_MONO
R202
C178 220n 16V
79 NC
2
R244
75R
100R
R198
HFLYBACK
R233
75R
4u7
50V
27k
C177 220n 16V
77 P2.4_PWM3
DVD_ON
R231
4
SDA
R156
100R
HOUT 30
76 P2.3_PWM2
50V
R243
10k
50V
75R
3
VSS
FBISO 31
1u
2
+8V
75R
3
1u
R254
1k
2n7
75 P2.2_PWM1
1
DVD_CVBS
R217
C176
PL117
4
4
50V
C174
ESD_20V
5
R115
100R
R157
100R
EHT_INFO
PL114
IRQ
SW2
R218
120k
100k
DECSDEM 32
74 P2.1_PWM0
R154
100R
1
PL121
10n
AUDEEM 33
73 P2.0_PMW
2
PL115
6
C175
390R
R196
IC103
2
PL118
SCL
Q115
1
BC858B
SIFAGC 36
72 P1.7_SDA
Z103
R245
75R
A2
R223
100R
3
BLM21A601S
R242
100R
RCA_V_IN
6k2
R220
EHTO 34
100R
1
1
3k3
71 P1.6_SCL
R197
1k
27k
PLLIF 35
IC2 37
R201
3
L125
BLM21A601S
R216
220R
R199
70 P1.3_T1
SVO_IFOUT 38
16V
69 P1.2_INTO
R144
100R
100R
R114
100R
6u8
2
100n
R143
100R
MUTE
24LC02
6
1u
L115
68 P1.1_T0
R147
PL101
820R
GND 41
CVBS2 42
GNDA1 43
67 P1.0_INT1
R142
100R
R145
7
16V
PL112
L124
L118
270p
50V
4.5MHz_TRAP
C170
WP
BC848B
Q118
3
VP1 39
R148
100R
100R
A1
1
100u
C172
100n
16V
R146
2
50V
C186
C173
66 VDDP
1N4148
47u
16V
2
Z102
PL116
220n
16V
16V
C160
220n
100n C158 16V
C 45
CVBS10 47
AUDOUT1 48
IFVO2 49
INSSW2 50
WHSTR 46
100n C157 50V
100n 16V
C148
100R
C159 R186
100R
R185
470R
R184
100R
R178
470R
R177
100n 16V
C147
R2_VIN 51
G2_YIN 52
BCLIN 54
RO 56
BLKIN 55
CVBS3_Y 44
AUDIO_OUT
C145
D107
100R
Q111
R175
100R
GO 57
100n
4.5MHz_TRAP
3
L122
C193
R241
10k
100n
D103
BC848B
15k
R173
BC848B
Q109
R174
100R
R162
100R
BO 58
C187
CVBS1 40
2u2
RCA_A_IN
R226
8
4R7
680k
VCC
R195
R219
A0
16V
470k
R225
1
D101
L104
IC100
2
220n
30k
AGC
1
C168
65 RESET
16V
16V
01 of 04
PL111
50V
10k
R141
R140
4k7
R139
4k7
4k7
R138
4k7
4k7
R131
R130
S106
100n
Sheet
+8V
C169
D108
5V1
12k
R111
R160
100R
+3V3_STB
+5V_STB
REMOTE
STBY
STBY_PR
RX
TX
SCL
SDA
+5V_STB
C132
100u
6k2
R112
47u
1
C110
C105
16V
10n
4k7
L109
BLM21A601S
C131
PL105
AGC 1
12MHz
R129
10k
AS 3
C142
47p
50V
X100
R137
PL104
BLM21A601S
39p
50V
C100
39p
50V
SCL
1
VT 2
C139
47p
50V
Author
YALCIN ELIK
C
C104
1
SDA
100R
R102
16V
KEYBOARD
BLM21A601S
08/10/2007
B
SCL 4
100R
R101
100n
16V
DATE
Rev.
03
A
SDA 5
2
5
+5V_STB
100u
100n
16V
SCL
4
C141
L103
Ver.
390p
50V
BLM21A601S
C138
D102
NC 6
3
C130
C103
100n
50V
SDA
PL107
C102
100u
16V
+5V
C137
L110
PL103
L101
22u
C146
LED
2
VS 7
C140
100n
16V
B2_UIN 53
1
TV R&D GROUP
11AK57 VIDEO&AUDIO
001.sht
R176
R128
100R
BLM21A601S
C136
100u
16V
Q110
+3V3_STB
Q105
BC848B
50V
KEYBOARD
100u
L108
+33V
NC/ADC 8
R158
330k
16V
R123
10k
Q103
BC848B
100n
TU100
38.9MHz_TVTUN
47u
4
1k
R100
C101
10k
R127
XTALOUT 64
VST 9
C135
BC858B
Q104
VDDA 59
10n
50V
1
VESTEL ELECTRONICS
2.2.3.1. Part1
+5V_STB
R161
3k9
3
R125
330R
VPE 60
TX
2
VDDC 61
2
2.2.3. AK57 Chassis Scematics
BC858B
Q107
220k
R136
OSCGND 62
IF2
RX
EHT_INFO
R126
330R
XTALIN 63
10n
50V
C205
IF2/GND 10
1
IRQ
+8V
R124
100R
220n
16V
1u
L100
IF1
BLM21A601S
C118
IF1 11
REMOTE
3
PL106
PL102
C204
220R
R159
220p
50V
L102
4
PL120
5
SC_B_IN
C128
2
1
PL800
F800
3.15A
VESTEL ELECTRONICSTV R&D GROUP
11AK57 SMPS
002.sht
VAR-510V
Ver.
R803
Author
Sheet
SMPS GROUP
02 of 04
DATE
Rev.
03
08/10/2007
L805
+300V
GND3
6
100p
16
7
2200u
IN OUT 2
VDIS GND
4
3
100n
50V
C838
1k
R836
SMPS_46
1N4148
5
86k
D812
BA159
R837
1M
160V
33u
C840
160V
47u
R853
150k
R852
220u
16V
C844
PROTECTION
+3V3_STB
D833
1N4148
STBY_PR
AUDIO_PR
1N4148
D816
MCR_GATE
D834
STBY
HOR_PR
1N4148
D835
1k5
R866
BC858B
Q812
+12V_IDTV
1N4148
D836
R815
2k
R831
22k
Q803
BC848B
DVD_PR
C2V4_SOD123
22k
R868
1N4148
Q813
BC848B
D838
C853
C854
1u
16V
1u
D801
16V
R827
10k
C814
D802
TL431SAMF2
100V
4n7
R839
99k
1N4148
470R
R823
10k
R822
STBY
R816
10k
R850
220k
R869
DRIVER
R826
10k
GND
Q801
BC858B
4
L803
R824
10R
C847
470p
1kV
R851
680R
Q802
C817
470p
1kV
50V
22n
6
R832
1k2
VCC
MTP6N60E/SSP7N60A
CONT_IN
B+
MCR_GATE
D800
MCR22_6
400V
MC44608
3
1n
1kV
7
C849
NC
D815
250V
1u
I_SENSE
C813
33u
50V
C839
C846
2200u
6V3
D839
100p
50V
2
R830
1k
8
C812
100n
25V
L807
150uH
4R7
C828
VI
1n
50V
DEMAG
D814
UF5407
BA159
C827
1
D803
IC806
C807
C833
S818
C845
100n
16V
+12V_A
1N4148
1n
1kV
+5V_DVD
D805
6
5
R855
100n
25V
C851
R857
470R
L801
C850
10u
50V
5k1
D831
ESD_20V
ESD_20V
D830
D829
R842
4k7
TL431SAMF2
PL805
1k
R854
R856
2n2
4kV
D827
5k1
Q808
BC848B
A D813 K
1
2
PL803
1
C805
68n
50V
ESD_20V
75R
R838
R846
2k2
TCET110G
PL804
R845
2k2
2
3
1
C852
1k
R841
C841
C5V6_SOD123
C8V2
D804
+12V_DVD
R833
33R
4n7
4kV
C816
4M7
C804
1
2
50V
1n
IC811
4
R810
4
3
1k
R865
47n
50V
+3V3_DVD
D806
C815
1N4148_SOD123
R828
330R
R825
0R22
1N4148_SOD123
50V
1n
C803
16V
220u
+3V3_DVD
R821
33k
R807
1k
D828
100n
50V
IC815
LM1117
3 IN OUT 2
GND VOUT
1
4
1N4148
1000u 16V
2u2
L804
D832
AUDIO_PR
R867
3k3
C823
R864
10k
50V
1n
1kV
R863
3R3
2W
14
C826
C822
GND2
3
100n
GND
D824
KA78R12
IC814
1
R849
470R
D810
BA159
C848
13
+5V_DVD
3
2
C843
C825
BYD33D
1n1kV
+22V
220p
1kV
C837
2
R835
1k8
33k
C810
47n
630V
R820
C856
1kV
10n
C809
150u
400V
IC813
L4931
1
D811
C842
9
6V3
2200u
5
C811
NC1
10k
R860
DVD_PR
UF5402
+8V5
NC2
150R
R861
Q811
BC848B
10
16V
D823
D822
NC3
Q810
BC848B
10k
R859
+8V5_1
4
1N4007
1N4007
D821
1N4007
1kV
1N4007
1n
D820
D819
VVC
C806
100n 50V
BYD33D
C836
16V
470u
12
C802
1n
1kV
C824
D809
GND1
560R
R862
R858
10k
100p
1kV
2R2
C2V7
STB_SUPPLY
11
1N4007
1u
16V
+3V3_STB
C820
R806
D818
C855
1kV
R873
680k
+14V
1N4007
1u
16V
BC327
Q809
C821
RL800
+5V_STB
2
1000u
25V
BYD33D
15
+12V
65uH
100n
50V
8
IC812
378L05_TO921
L806
HOR_PR
+112V
C830
D825
2
4
DRAIN
C832
1
S800
6
1
100n
50V
UF5402
9R
3
150n
250V
R872
680k
+12V_IDTV
C831
2200u
16V
D808
5
1N4148
2
TH800
L800
2x27m
3
1
C801
R871
680k
C834
C818
D807
NC
C835
S817
TR800
1
4
150n
250V
+12V_DVD
2u2
1kV
100p
PL802
2
3
C800
+12V_IDTV
1
2
Q804
BC848B
R834
22k
Q805
BC848B
R843
22k
3
STB_SUPPLY
R844
22k
4
STBY
+33V_IDTV
5
FBKSUPPLY
GND
OUT
OUTSUPPLY
N_INVERT_IN
3
4
5
6
7
INVERT_IN
VCC
1
2
STV9379FA
IC600
VESTEL ELECTRONICS TV R&D GROUP
100u
VERT+
Ver.
63V
C602
C600
2n2
50V
11AK57 DEFLECTION
003.sht
03
DATE
Rev.
08/10/2007
Author
Sheet
YALCIN ELIK
03 of 04
-14V
+14V
D603
HER107
VERT2k2
R604
2n2
2k2
PL600
C603
1
50V
TR600
25V
470u
C615
10R
2
R620
0R22
1/2W
D607
45V
D606
-14V
470u
25V
C616
10R
15V
R609
R608
1R
EHT
5
5k1
R606
D600
C608
VPROT
BA159
+14V
100n
100V
R612
22n
100V
390R
C604
27k
R605
R607
100p 50V
C8V2
R621
0R22
1/2W
BA159
6
R613
GND1
7
33R
Q601
BC639
D602
R616
75R
G2
100n
220u
16V
16V
150V
NC
3
B+
2
R633
C8V2
+33V_IDTV
COLLECTOR
EHTINFO
1
33R
BA159
10
+33V
R630
0R22
1/2W
5
Q603
2
4
R610
100R
10V
R632
1k
HEATER
11
8
FBT_AK19
250V
10u
BU2508AF
R618
47R
C607
2n2
2kV
D609
C613
47n
250V
C612
47n
250V
13
1
2
HEATER
500V
R619
HFLYBACK
C622
330n
250V
1N4148
10k
C624
5k1
BA159
1n
D610
C614
R628
1/4W
R627
1N4148
D604
PL601
D605
47n
100V
1N4148
HOUT
2
1
Q600
BC639
R631
1R
1W
100n
50V
+5V
C606
VIDEO_B+
+8V
EHT_INFO
PL603
C623
R603
22R
10k
R634
22n
100V
100R
R611
C605
100u
16V
R624
0R47
1/2W
C625
3
1
R602
1R5
1/2W
GND3
12
10u
250V
+12V
BA159_SMD GND2
VIDEO_B+
C619
L600
7n5
1.6kV
C611
D611
100u
50V
D601
16V
C610
100u
4
E_W
C618
BC639
+8V
D608
C626
Q602
FOCUS
C617
75R
16V
R617
100u
9
R622
0R22
1/2W
BY299
+9V
R614
4R7
C609
C5V6
200V
+5V
D612
R601
R600
100k
C601
3
4
R925
75R
+200V
C901
Q908
BF422
R907
10k
+200V
PL901
180p
50V
R900
1k8
Q900
2SC2482
BF421
Q903
R
G
3
R924
75R
820p
50V
+200V
R909
330R
C905
3k3
R901
5
R917
100R
B
C902
8
GND F2
6
7
G1
2
1
Q907
BF422
10k
R911
+200V
G2
4
G3
EHT
9
PL900
1
180p
50V
2
R902
1k8
Q901
2SC2482
BF421
Q904
3
PL902
R
5
R920
1k5
G
3
R923
1k5
Q906
BF422
10k
R912
+200V
C903
R919
1k5
+200V
R926
75R
820p
50V
3k3
R903
C900
220p
50V
5
R910
330R
4
C907
R918
100R
B
8
GND F2
6
7
G1
2
1
G2
4
G3
EHT
9
180p
50V
R904
1k8
BF421
Q905
C913
PL904
1
2n7
1kV
R914
330R
820p
50V
R922
100R
C909
3k3
R905
Q902
2SC2482
1
PL905
1
+200V
PL907
Ver.
03
Rev.
DATE
08/10/2007
Author
Sheet
YALCIN ELIK
04 of 04
1
PL906
1
PL903
2
3
11AK57 CRT BOARD
004.sht
4
VESTEL ELECTRONICSTV R&D GROUP
2.2.4. DVD PLAYER
2.2.4.1. General Description
2.2.4.1.1.
MT1389D
The MT1389D Progressive Scan DVD-Player Combo Chip is a single-chip MPEG video decoding chip
that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. Copy
protection, DVD system navigation, system control and housekeeping functions.
The features of this chip can be listed as follows:
Features
•
•
•
•
•
•
•
Progressive scan DVD-player combo chip
Integrated NTSC/PAL encoder.
Built-in progressive video output
DVD-Video, VCD 1.1, 2.0, and SVCD
Unified track buffer and A/V decoding buffer.
Direct interface of 32-bit SDRAM.
Servo controller and data channel processing.
Video Related Features:
•
•
•
•
•
Macrovision 7.1 for NTSC/PAL interlaced video.
Simultaneous composite video and S-video outputs, or composite and YUV outputs, or composite
and RGB outputs.
8-bit CCIR 601 YUV 4:2:2 output.
Decodes MPEG video and MPEG2 main profile at main level.
Maximum input bit rate of 15Mbits/sec
Audio Related Features:
•
•
•
•
•
•
Dolby Digital (AC-3) and Dolby Pro Logic.
Dolby Digital S/PDIF digital audio output.
High-Definition Compatible Digital. (HDCD) decoding.
Dolby Digital Class A and HDCD certified.
CD-DA.
MP3.
2.2.4.1.2.
SDRAM Memory Interface
The MT1389D provides a glueless 16-bit interface to DRAM memory devices used as OSD, MPEG
stream and video buffer memory for a DVD player. The maximum amount of memory supported is 16MB
of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 110-Mb
addressing. The memory interface controls access to both external SDRAM memories, which can be the
sole unified external read/write memory acting as program and data memory as well as various decoding
and display buffers.
2.2.4.1.3.
Drive Interfaces
The MT1389D supports the DV34 interface, and other RF and servo interfaces used by many types of DVD
loaders. These interfaces meet the specifications of many DVD loader manufacturers.
2.2.4.2. System Block Diagram and MT1389D Pin Description
2.2.4.2.1.
MT1389D Pin Description
2.2.4.2.2.
2.1 Sytem Block Diagram
A sample system block diagram for the MT1389D DVD player board design is shown in the following figurre:
2.2.4.3. Audio Output
The MT1389D supports two-channel and six-channel analog audio output. In a system configuration with six
analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and
Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The MT1389D also
provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs.
2.2.4.4. Audio DACS
The MT1389D supports several variations of an I2S type bus, varying the order of the data bits (leading or no
leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the MT1389D
internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data
and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The twochannel DAC is internal. The six channel DAC is PCM1606. The outputs of the DACs are not differential. The
buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.
2.2.4.5. Video Interface
Video Display Output
The video output section controls the transfer of video frames stored in memory to the internal TV encoder of
the MT1389D. The output section consists of a programmable CRT controller capable of operating either in
Master or Slave mode.
The video output section features internal line buffers which allow the outgoing luminance and chrominance
data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0
component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and
interpolation.
Video Bus
The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel
format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y)
pixels; there are as many chrominance lines as luminance.
Video Post-Processing
The MT1389D video post-processing circuitry provides support for the color conversion, scaling, and filtering
functions through a combination of special hardware and software. Horizontal upsampling and filtering is done
with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is
achieved by repeating and dropping lines in accordance with the applicable scaling ratio.
Video Timing
The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The
double clock typically is used for TV displays, the single for computer displays.
2.2.4.6. Flash Memory
The decoder board supports 70ns Flash memories.
FLASH_512K_8b
The MT1389D permits 8- bit common memory I/O accesses.
2.2.4.7. Serial Eeprom Memory
An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and
software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC
footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent.
2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component
Configuration
The MT1389D audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs
and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio
output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be
channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew.
The transmit I2S interface supports the 112, 128, 192, 256, 384, and 512 sampling frequency formats, where
sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S
transmit interface can be 16, 18, 20, 24, and 32-bit samples.
For Linear PCM audio stream format, the MT1389D supports 48 kHz and 96 kHz. Dolby Digital audio only
upports 48 kHz. The MT1389D incorporates a built-in programmable analog PLL in the device architecture in
order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output
from or an input to the MT1389D. Audio data out (TSD) and audio frame sync (TWS) are clocked out of the
MT1389D based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in
audio data in (RSD) and audio receive frame sync (RWS).
2.2.4.9. Scematics
2.2.4.9.1.
Part1
5
3
2
1
VCC
[1,2,4]
VCC
[1,2,3]
DV33
[1,2,3,4]
GND
[2]
[2]
DV33
GND
AL
AR
AL
AR
[1]
[2]
4
+12V
+12V
MUTE_DAC
MUTE_DAC
D
D
LCH
RCH
LCH
RCH
[4]
[4]
R116
24k
C74
4
R118
5.1k
C77
R119
100
U13A
NJM4558 OPA
LCH
A_MUTE
Q14
2N3904
SOT23
2
8
1000pF
10uF/16v
3
+
10uF/16v
C76
1
+
2
1/2VCC 3
10k
+
R117
-
C75
AL
100pF
1
+12V
MUTE
R120 10K
VCC
R122
24k
C
C
R123 22k
+12V
C78
100pF
+ CE31
R126
5.1k
6
+
1/2VCC 5
10k
10K
10uF/16v
C83
R127
100
RCH
A_MUTE
Q16
2N3904
SOT23
2
8
U13B
NJM4558 OPA
10uF/16v
+12V
Q25
3906
1
Q15 2
3906
2
1000pF
1
1
1
4.7V
C80
7
3
R125
+
C79
AR
R121
4
2
100uF/16V
D17
+
470
-
R124
Q28
1
3906/NC
3
D19
1
3
3
DV33
1N4148/NC
2
A_MUTE
1K
2
R147
R134
R171
10K/NC
10K/NC
MUTE_DAC
B
B
+12V
R17210k
R173100k
1/2VCC
CB57
R174
0.1uF
10k
+ CE38
47uF/16V
A
A
MediaTek Confidential
MediaTek (ShenZhen) Inc.
Title
Size
C
Date:
5
4
3
2
COMMON1389E_HD60
Document Number
Drawn:
AUDIO OUT
Saturday, December 09, 2006
1
changqiao
Checked: Tom Wang
Sheet
1
of
Rev
3
5
5
4
3
2
1
R178 100
+5VV
[2]
[5]
[5]
2
R86
75/NC
C110
0.1UF
1N4148/NC
R88
0
CVBS
100PF
Q10
3906/NC
C104
C105
47P
47P
100PF
ASPDIF
1
2
3
C51
D27
+ C52
10uF/16v
0.1uF
L28 1.8uH
R180
100/NC
33
CVBSO
2
R90
75
C111
VCC
R73
ASPDIF
LCH
RCH
ASPDIF
LCH
RCH
D25
1
CVBS
R
G
VB
CVBS
R
G
VB
2
VCC
GND
[2]
[2]
[2]
[2]
1
[1,2,5]
VCC
[1,2,3,5] GND
TP3
C109
J10
TJC3-3AW
D
C112
OPTICAL
P=2.54mm
27PF
1N4148/NC
1
D
+12V
+12V
3
[1]
R179 75
+5VV
J9
+5VV
2
+5VV
CVBSO
R/V
G/Y
B/U
R74
1N4148/NC
LCH
RCH
1
0
G/Y
G
47P
47P
1N4148/NC
C
1
C101
3
C100
D21
TJC3-10AW
L27 1.8uH
C
+5VV
+5VV
L20
+5VV
R80
D24
+ C50
1N4148/NC
B/U
47P
9014
D26
RGB/CVBS#
1N4148/NC
3
47P
Q29
3906
B
1
B
1.8uH
C58
4.7K
2
Q30
2
RGB_SWITCH
1
Q8
3906/NC
2
L23
C57
R183 2K
[2]
2
VB
R84
75
R182
1
0
1
R82
1
75/NC
47uF/16v/NC
0.1uF
R181 10K
3
10uH/NC
C48
VCC
2
+5VV
3
VCC
Q6
3906/NC
2
R78
75
2
1
R76
RGB/CVBS#
ASPECT
D20
75/NC
1
2
3
4
5
6
7
8
9
10
+12V
R184 680
ASPECT
C
R185
B E
3904 / 3906
FS0
3
Q31
2
2N3904
2N3904
+5VV
E
[2]
2
B
1
3906
C
Q32
2
R188 2k
1
R187 2k
[2]
75
3
1k
+5VV
R186
R87
FS1
D28
75/NC
1N4148/NC
1
0
R/V
R
C63
C64
47P
47P
D29
1N4148/NC
3
L26 1.8uH
R91
75
A
1
A
Q11
3906/NC
2
2
1
R89
Title
COMMON1389E_HD60
Size Document Number
Custom
VIDEO
Date:
5
4
3
2
Drawn:
OUT
1
changqiao
Checked: Tom Wang
Sheet
of
2
Rev
3
5
5
[1,2,5]
DV33
[1,2,4,5] GND
D
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
4
PCE#
PRD#
PWR#
VCC
A[0..20]
A[0..20]
FLASH
C
CS#
RAS#
CAS#
WE#
8
6
4
2
DRAM
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
DBA0
DBA1
23
24
25
26
29
30
31
32
33
34
22
35
20
21
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
BA0/A13
BA1/A12
SDCLK
SDCKE
38
37
CLK
CKE
DCS#
DRAS#
DCAS#
DWE#
19
18
17
16
CS
RAS
CAS
WE
DQM0
DQM1
15
39
DQML
DQMH
36
40
NC
NC
RN1
7
5
3
1
33x4
DBA0
R60
33
BA0
DBA1
R61
33
BA1
SDCKE
R62
33
DCKE
SDCLK
R63
33
DCLK
54
41
28
DQ[0..15]
DQ[0..15]
U8
MA[0..11]
BA[0..1]
DQM[0..1]
DCLK
DCKE
CAS#
RAS#
WE#
CS#
PCE#
PRD#
PWR#
VCC
DCS#
DRAS#
DCAS#
DWE#
1
[2]
DRAM
[2]
2
DV33
GND
MA[0..11]
BA[0..1]
DQM[0..1]
DCLK
DCKE
CAS#
RAS#
WE#
CS#
[2]
[2]
[2]
[1]
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
VCC
VCC
VCC
1
14
27
VCCQ
VCCQ
VCCQ
VCCQ
3
9
43
49
VSSQ
VSSQ
VSSQ
VSSQ
6
12
46
52
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
AD[0..7]
AD[0..7]
FLASH
SD33
VSS
VSS
VSS
[2]
U7
SD33
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
DBA0
21
22
23
24
27
28
29
30
31
32
20
19
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
BA/A11
SDCLK
SDCKE
35
34
CLK
CKE
DBA1
DRAS#
DCAS#
DWE#
18
17
16
15
CS
RAS
CAS
WE
DQM0
DQM1
ESMT M12L64164A/N.C
TSOP54
14
36
DQML
DQMH
33
37
NC
NC
26
50
VSS
VSS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
2
3
5
6
8
9
11
12
39
40
42
43
45
46
48
49
VCC
VCC
1
25
VCCQ
VCCQ
VCCQ
VCCQ
7
13
38
44
VSSQ
VSSQ
VSSQ
VSSQ
4
10
41
47
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
SD33
D
[2,3]
[2,3]
SCL
SDA
SCL
SDA
IIC
DV33
SD33
L29 FB
SD33
SD33
+ CE25
47uF/16v
CB38
CB39
CB40
CB41
CB42
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C
ESMT M12L16161A-7
C107
10PF
CB43
0.1uF
CB44
0.1uF
CB45
0.1uF
CB46
0.1uF
CB47
0.1uF
16Mb
A20
R64
AA20
0/NC
U9
B
DV33
FVCC
R85
FVCC
0
R68
CE26
10uF/16v
+
CB50
0.1uF
R70
CB52
0.1uF
10k
FVCC
10k
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
AA20
PCE#
PRD#
PWR#
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
9
10
26
28
11
A
12
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
CE
OE
WE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15/A-1
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
WP/ACC
14
BYTE
47
VCC
37
GND1
GND2
27
46
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
B
DV33
DV33
U11
1
2
3
4
FVCC
A0
NC
NC
NC
GND
VCC
WP
SCL
SDA
8
7
6
5
R67
1k
R65
1k
GND
SCL
SDA
EEPROM 24C02
SOP8
CB53
0.1uF
RESET
COMMON1389E_HD60
IC FLASH MX29LV800 8Mb
Size
B
Date:
5
4
A
Title
3
2
Drawn:
Document Number
SDRAM&FLASH
changqiao
Checked: Tom Wang
3
of
Sheet
1
Rev
3
5
4
3
2
C3
JITFO
V20
V2P8
0.47uF/N.C
C9
20pF
C14
CB12
10uF/16v
0.1uF
0.1uF
47uF/16v
10uF/16v
1500pF
C15
R14
CB15
+ CE17
CB16
+ CE18
DACVDD3
CVBS
R
VB
G
DACVDD3
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
+ CE16
47uF/16v
0.1uF
47uF/16v
0.1uF
47uF/16v
AVDD3
IREF
RFGC
OSN
OSP
RFGND
CRTPLP
HRFZC
RFRPAC
RFRPDC
RFVDD3
ADCVSS
ADCVDD3
LPFOP
LPFIN
LPFIP
LPFON
PLLVDD3
IDACEXLP
PLLVSS
JITFN
JITFO
XTALI
XTALO
RFVDD18
RFGND18
ADACVDD2
ADACVDD1
ALF(CTR)
ALS/SDATA0
AL/SDATA2
AVCM
AR/SDATA1
ARS
ARF(SW)
ADACVSS2
ADACVSS1
APLLVSS
APLLCAP
APLLVDD
AADVDD
AKIN1
ADVCM
AKIN2
AADVSS
R/Cr/CVBS/SY
B/Cb/SC
DACVSSA
G/Y/SY/CVBS
DACVDDA
DACVSSB
DACVDDB
CVBS
DACVSSC
0.1uF
0603
L11
10uH
AADVDD3
C
B
A
D
RFO
+
C28
6800pF
C0603/SMD
RFV33
C108
100NF
V18
RFV18
CB17
E
F
MDI1
AVCC1
LDO2
LDO1
2N3904
AVCC1
10k
RFVDD3
CB18
3
100k
0.1uF
R33
IOA
10k
E3
B
S
3
1
1
1
2
G
2
Q2
2SK3018
R35
2
100k
TEZISLV
OPO
OPOP+
DMO
FMO
TROPEN
C36
Q3
0.1uF
3
3
VCC
2SK3018
FB
2SK3018
L13
C37
NC
V1P4
26
C38
TRO
FOO
ADIN
100uF/16v
GND
LD-DVD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
V18
AVCC1
MDI1
LD-CD
STBY
A2
V18
A3
A4
A5
A6
A7
A8
2
E
AVCC1
V20
GND
F
B
A
RFO
IOA
D
C
0.1uF
E3
C
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
CB19
B
IOA18
IOA19
IOWR#
A16
HIGHA7
DVDD3
HIGHA6
HIGHA5
HIGHA4
HIGHA3
HIGHA2
HIGHA1
IOA20
IOCS#
IOA1
IOOE#
AD0
AD1
AD2
DVSS
AD3
AD4
AD5
AD6
IOA21
ALE
AD7
A17
IOA0
DVDD18
UWR#
URD#
DVDD3
UP1_2
UP1_3
GPIO6
UP1_4
UP1_5
UP1_6
UP1_7
UP3_0
UP3_1
UP3_4
UP3_5
GPIO7
ICE
PRST#
IR
INT0#
DQM0#
RD7
RD6
RD5
DVDD3
C
1
2SB1132
A18
A19
3
Q4
8550
10
R41
RFV33
1
+ CE22
T+
30
G2
22
23
24
25
26
27
28
PREGND
VINLD
CTK2
CTK1
VINTK
BIAS
STBY
A
FMSO
20k
CB34
TRSO
V1P4
STBY
VOFC+
VOFCVOSL+
VOSLPGND
PVCC1
VCC
14
13
12
11
10
9
8
R50
10k
LOADLOAD+
TROUT
R54
10k
TRIN
G1
29
VNFFC
VOSL
VINSLVINSL+
CF2
CF1
VINFC
20k
18k
15k
10k
0.1uF
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ0
DQ1
DQ2
DQ3
DQ4
AL
AR
[5]
[5]
MUTE_DAC
[5]
DV33
[3]
[3]
[3]
FLASH
MA[0..11]
MA[0..11]
DQ[0..15]
BA[0..1]
DQ[0..15]
BA[0..1]
DQM[0..1]
DCLK
DCKE
CAS#
RAS#
WE#
CS#
V18
[3]
PRD#
PWR#
PCE#
J3
4
3
2
1
[3]
AD[0..7]
PRD#
PWR#
PCE#
C
[4]
[4]
[4]
[4]
VIDEO INTERFACE
A[0..20]
A[0..20]
TxD
RxD
U3
MT1389E
LQFP216/SMD
CVBS
R
G
VB
AD[0..7]
[3]
[3]
[3]
DQM[0..1]
DCLK
[3]
[3]
DCKE
CAS#
RAS#
WE#
CS#
[3]
[3]
[3]
[3]
[3]
B
MEMORY
CB20
CB21
CB22
CB23
CB24
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
SCL
SDA
CB25
CB26
CB27
CB28
CB30
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C39
C40
C41
SCL
SDA
[3]
[3]
ASPDIF
[4]
DV33
C42
VCC
R83
1
R52
10k
0.015uF
R53
20k
CB32
CB33
0.1uF
0.1uF
0.1uF
AUDIO INTERFACE
MOVCC
use DIP decal
0.1uF
CB31
Q24
R8
V1P4
2K
8550
Q21
8550
R7 2K
DMSO
LOAD-
A
C45
V1P4
0.1UF
R55
20k
VCC
C44
FOSO
MO_VCC
LOAD+
L31 FB
TRCLOSE
R4
100 2
2 R5
Q9
8050
+ CE24
47uF/16v
100 TROPEN
Q20
8050
Title
Size
C
Date:
5
[1]
[1]
[1]
[3]
[3]
RGB_SWITCH [4]
FS0
[4]
FS1
[4]
CVBS
R
G
VB
ASPDIF
CD5954
CB36
RGB_SWITCH
FS0
FS1
MA0
MA10
BA1
BA0
CS#
RAS#
CAS#
WE#
DQM1
DQ8
DQ9
FOO
TRO
FMO
DMO
150pF
10k
VSCK
VSDA
VSTB
PCE#
PWR#
VCC
MO_VCC
330pF 330pF
7
6
5
4
3
2
1
[1]
PH2.0-5AW
R46
R47
R48
R49
FOSO
TRSO
FMSO
DMSO
0.1uF
R58
MUTE_DAC
DCLK
MA3
MA2
MA1
5
4
3
2
1
R45
1
SPSP+
IR
IIC
1
C43
150pF
VOTK+
VOTKVOLD+
VOLDPGND
VNFTK
PVCC2
[1,3,5]
[1,3,4,5]
DV33
3
MO_VCC
AL
AR
J4
3
15
16
17
18
19
20
21
SL+
SL-
R51
R44
1
U4
T-
TRIN
LIMIT
MA4
MA5
MA6
MA7
MA8
MA9
MA11
DCKE
TP4
FF+
R43
1
VSCK
VSDA
VSTB
PCE#
PWR#
LDO1
DV33
R42
1
IR
8550
47uF/16v
[1]
[1,4,5]
DV33
GND
TROUT
V18
2
URST#
VCC
DV33
GND
RS-232
10
Q5
HA1
HEADER 24 SMD0.5 TOP
URST#
VCC
PH2.0-4AW
PWR#
A16
A15
1
25
R40
CE21
47uF/16v
560
0.1uF
DV33
LDO2
2
+
TOP
NC
+ CE34
0.1uF
B
R38
C34
MUTE_DAC
RGB_SWITCH
FS0
FS1
3
1
V2P8
V20
V1P4
C
1
Q1
2N3904
R26
DACVDD3
ASPDIF
1
2
D
FS
VREF
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
DQM0
DQ7
DQ6
DQ5
R32
R31
Pin Assignment v1.4
URST#
IR
0.1uF
C
MT1389E
RXD
TXD
TRCLOSE
V18
V18
FS
VREF
DACVDDC
SPDIF
MC_DATA
ASDATA3
ASDATA2
ASDATA1
ASDATA0
ALRCK
ACLK
ABCK
GPIO5
DVSS
GPIO4
GPIO3
DVDD18
RA4
RA5
RA6
RA7
RA8
RA9
RA11
CKE
DVDD3
RCLK
RA3
RA2
RA1
DVDD18
RA0
RA10
BA1
BA0
RCS#
RAS#
CAS#
RWE#
DQM1
RD8
RD9
DVSS
RD10
RD11
RD12
RD13
RD14
RD15
RD0
RD1
RD2
RD3
RD4
VSCK
IOA
VSTB
VSDA
SCL
SDA
+
1uF
AD7
A17
A0
CE36
1uF
C33
C
B
A
D
L37 FB
47uF/16v
1uF
C30
1uF
C32
1uF
CC
BB
AA
DD
C29
C31
AGND
DVDA
DVDB
DVDC
DVDD
DVDRFIP
DVDRFIN
MA
MB
MC
MD
SA
SB
SC
SD
CDFON
CDFOP
TNI
TPI
MDI1
MDI2
LDO2
LDO1
SVDD3
CSO/RFOP
RFLVL/RFON
SGND
V2REFO
V20
VREFO
FEO
TEO
TEZISLV
OP_OUT
OP_INN
OP_INP
DMO
FMO
TROPENPWM
PWMOUT1/ADIN0
TRO
FOO
FG/ADIN1
GPIO0/VSYNC#
GPIO1/HSYNC#
GPIO2
IOA2
DVDD18
IOA3
IOA4
IOA5
IOA6
IOA7
HIGHA0
AD3
AD4
AD5
AD6
CE19
47uF/16v
DV33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
A14
A13
A12
A11
A10
A9
A20
PCE#
A1
PRD#
AD0
AD1
AD2
DV33
D
C19
33pF
27MHz
DV33
CB14
10k
DV33
R176
33
XO
C18
33pF
PH2.0-6AW
R24
100k
Y1
XI
ADVCM
APLLVDD3
AADVDD3
AR
XI
XO
R175
33
ADACVDD3
ADACVDD3
R13
1000pF
V1P4
C13
AL
C26
0.1uF
DV33
CE12
10uF/16v
DC4
+
+ CE13
0.1uF
C12
DV33
DV33
CB10
RFV18
C21
6800pF
C0603/SMD
R10
10
APLLVDD3
L30 10UH
CB11
C11
10uF/16v
JITFN
JITFO
XTALI
CE15
47uF/16v
0.047uF
0.1uF
C25
CB13
PLLVDD3
CE14
10uF/16v
+
+
RFVDD3
C24
0.047uF
ADACVDD3
6
5
4
3
2
1
SLSL+
0.1uF
V1P4
1.8uH
V1P4
J2
ADACVDD3
SPSP+
LIMIT
D
750k
DACVDD3
C17
1
PLLVDD3
RFVDD3
NC
R23
L10
680k
0.033uF
R20
R19
6.8
R17
C16
2200pF
R18
15k
C20
0.1uF
R16
150k
RFVDD3
R15
150k
R9
C10
0.1uF
OPOP+
0.1uF
DV33
ADIN
C23
C27
0
100k
C6
R12
0.1uF
OPO
680k
C22
R11
C5
0.1uF/NC
1
JITFN
DV33
+
2200pF
390pF
+
RFV33
C4
RFVDD3
RFV33
+
5
4
3
2
COMMON1389E_HD60
Document Number
Drawn:
MT1389E LQFP 216
1
changqiao
Checked: Tom Wang
Sheet
4
of
Rev
3
5
5
4
3
2
1
COMMON1389E_HD60_V3
MT1389E (LQFP216) DVD MP Board for SANYO HD60 PUH
D
1
2
3
4
5
INDEX & POWER, RESET
MT1389E
SDRAM & FLASH
VIDEO OUT & AV-CON
AUDIO OUT - WM8766
TYPE
Digital 5V
Digital 3.3V
Servo 3.3V
Laser Diode 3.3V
Digital 1.8V
Digital 3.3V
Audio +12V
Audio -12V
Audio 5V
Audio 3.3V
NAME
VCC
DV33
RFV33
AV33
V18
SD33
+12V
-12V
AVDD5
DVDD3
D
DEVICE
SUPPLY
MT1389E
MT1389E
Rev
MT1389E
SDRAM
OP AMP.
OP AMP.
Audio DAC
Audio DAC
History
P#
Date
V1
Initial released. Modified from 3-SY1389DP1-V11
2005.01.19
V2
Add SCART and VGA output
2005.03.01
V3
Modify Video backend circuit.
2005.03.09
+12V
+12V
URST#
IR
C
DV33
VCC
DV33
VCC
GND
[4 5 ]
URST# [ 2 ]
IR
[2]
GND
C
[ 2,3,5]
[ 2,4,5 ]
[ 2,3,4,5]
CON1
6
5
4
3
2
1
+5VCC
+12VCC
+3.3VCC
+12V
L35 FB
+12VCC
CE5
TJC3-6AW
HEAD6-2.54/H
P=2.54mm
[2]
[2]
[2]
CB5
+
100uF/25v
L36 FB
3
CE10
+
CB8
0.1uF
100uF/16v
R2
R3
R1 R177
10K
10k
10k
RESET Circuit
GND
VCC
U10
AZ-1117 3.3V/NC
OUT 2
IN
+
CE39
100uF/16v/NC
1
DV33
VSCK
VSDA
VSTB
+3.3VCC
VCC
+5VCC
B
VSCK
VSDA
VSTB
0.1uF
B
DV33
10
CON2
6
5
4
3
2
1
IR
IRVCC
VSDA
VSCK
VSTB
D3
DV33
L32
+ CE1
TJC3-6AW
P=2.54mm
R6
10k
1N4148
+3.3VCC
C1
10pF
URST#
10uF/16v
FB
CB3
+ CE2
0.1uF
+
100uF/16v
V18
L33
FB
CE9
10uF/16v
DC4
D11
+ CE37
1N4007
D9
1N4007
+ CE7
CB7
100uF/16v
100uF/16v
0.1uF
A
A
FM1
FM2
Title
Size
C
Date:
5
4
3
2
COMMON1389E_HD60
Document Number
Drawn:
INDEX
1
changqiao
Checked: Tom Wang
Sheet
5
of
Rev
3
5
2.3.
AK57 Service Menu
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
( Possible Settings )
Varsayılan Değer
( Default )
001
FAPS
First APS
ON = Aktif
OFF = İn-Aktif
OFF
002
ISPM
I2C Modu
003
INIT
( I2C Mode )
Yazılım ve donanım resetleme
( Resetting software and hardware )
ON = Active
OFF = In-active
OFF
ON = Resetleme aktif
OFF = Resetleme in-aktif
OFF
OFF
ON = Enable resetting
OFF = Disable resetting
Table 1 Init
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
004
AGCSPD
IF AGC hızı
0 = Yavaş
1 = Standart
2 = Hızlı
3 = Hız seviyesi 2’ den daha
yüksek
1
( IF AGC speed )
005
AGCTO
AGC Take over
0 = Slow
1 = Standard
2 = Fast
3 = Fastest
0..63
31
Table 2 AGC Servis ayarları ( AGC Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
006
COFF
Cut – Off Ayarı
0..63
32
( Cut-Off setting )
Table 3 VG2 Alignment Servis ayarları ( VG2 Alignment Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
007
VERT SLOP
Dikey eğim (VSL), SBL biti yarı blank’e
anahtarlanmalıdır.
0..63
32
0..63
32
008
SCORRECTION
( Vertical slope (VSL), SBL bit should be
keyed to half-blank.)
S-doğrulaması (SC)
009
VERT SHIFT
( S-correction (SC) )
4:3 Wide Screen için dikey kaydırma
0..63
32
010
VERT AMP
( 4:3 vertical shifting for Wide Screen )
Dikey genlik (VA)
0..63
32
011
HOR SHIFT
( Vertical Amplitude (VA) )
Yatay kaydırma
0..63
32
012
VERT SHIFT16
( Horizontal shifting )
16:9 Wide Screen için dikey kaydırma
0..63
32
013
VERT AMP16
( 16:9 vertical shifting for Wide Screen )
16:9 Dikey genlik
0..63
32
014
RGB HSH
( 16:9 Horizontal amplitude )
50 Hz’lik RGB modunda yatay kaydırma
0..63
37
RGB HSH60
( In RGB mode with 50 Hz, horizontal
shifting )
60 Hz’lik RGB modunda yatay kaydırma
0..63
37
60HZ HSH 43
( In RGB mode with 60 Hz, horizontal
shifting )
4:3 MODE 60 Hz yatay kaydırma
0..63
31
60HZ VSH 43
( In 4:3 MODE with 60 Hz, horizontal
shifting )
4:3 MODE 60 Hz dikey kaydırma
0..63
31
60HZ VA 43
( In 4:3 MODE with 60 Hz, vertical
shifting )
4:3 MODE 60 Hz dikey genlik
0..63
31
60HZ VSH 169
amplitude )
16:9 MODE 60 Hz dikey kaydırma
0..63
31
60HZ VA 169
shifting )
16:9 MODE 60 Hz Dikey genlik
0..63
31
015
016
017
018
019
020
amplitude )
Table 4 Geometri Servis ayarları ( Geometry Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
021
QSS
Qss amfi mode değiştirici
ON = QSS Aktif
OFF = QSS İn-aktif
ON
( Switching the mode of the QSS amplifier )
022
OIF
IF-PLL’de DC ofset doğrultması
023
IF
( DC offset correction at IF-PLL )
PLL demodulatör frekansı
( PLL demodulator frequency )
024
025
OFR
FFI
Frekans Girişi Aktivasyonu: Installation
menüsündeki Tuning Mode olan Frekans modunu
aktif veya pasif hale getirir.
( Frequency Entry Activation: Frequency mode
which is value Tuning Mode item on the
Installation menu can be enabled or disabled by
OFR. )
IF-PLL Hız filtresi
( Fast filter IF-PLL )
026
027
028
029
BS1
BS2
BS3
CB
(Gerekli ayarlamayı yapmak için ilgili Tuner
dökümanına bakılmalıdır.)
( Please look at the related Tuner specification for
necessary adjustments. )
ON = QSS Active
OFF = QSS In-Active
0..63
0 = 58.75 MHz
1 = 45.75 MHz
2 = 38.90 MHz
3 = 38.00 MHz
4 = 33.40 MHz
5 = 42.00 MHz
6 = 33.90 MHz
7 = 48.00 MHz
8 = EXTERNAL
ON = Aktif
OFF = İn-aktif
29
2
ON
ON = Active
OFF = In-Active
ON =Hızlı zaman
sabiti
OFF = Normal zaman
sabiti
OFF
ON = Fast time
constant
OFF = Normal time
constant
0..15
1
0..15
2
0..15
4
0..255
142
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
030
B1-H
0..255
12
0..255
32
0..255
30
0..255
2
031
032
033
B1-L
B2-H
B2-L
Table 5 Tuning Servis ayarları ( Tuning Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
034
FRAV
AV için Peaking merkezi frekansı
1
035
YSCM
( For AV, Peaking center frequency )
SECAM için Y-delay ayarı
0 = 2.7 Mhz
1 = 3.1 Mhz
2 = 3.5 Mhz
0..15
036
YNTS
( For SECAM, Y-delay setting )
NTSC için Y-delay ayarı
0..15
2
037
YPAL
( For NTSC, Y-delay setting )
PAL için Y-delay ayarı
0..15
2
038
YAV1
( For PAL, Y-delay setting )
AV-1 için Y-delay ayarı
0..15
4
039
YSVHS
( For AV-1, Y-delay setting )
SVHS için Y-delay ayarı
0..15
4
12
( For S-VHS-2, Y-delay setting )
Table 6 Video Servis ayarları ( Video Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
040
WPRC
Cold için White point Red
0..63
32
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
WPGC
( For Cold, White point Red )
Cold için White point Green
0..63
32
042
WPBC
( For Cold, White point Green )
Cold için White point Blue
0..63
31
043
BLORB
0..63
32
044
BLOG
( For Cold, White point Blue )
Black seviyesi ofset Red – Blue
( Black level offset Red – Blue)
Black seviyesi ofset Green
0..63
32
045
WPRN
( Black level offset Green )
Normal için White point Red
0..63
37
046
WPGN
( For Normal, White point Red )
Normal için White point Green
0..63
32
047
WPBN
( For Normal, White point Green )
Normal için White point Blue
0..63
19
048
BLRB-RGB
( For Normal, White point Blue )
RGB için Black seviyesi ofset Red – Blue
0..63
32
049
BLG-RGB
( For RGB, Black level offset Red – Blue )
RGB için Black seviyesi ofset Green
0..63
32
050
WPRW
( For RGB, Black level offset Green )
Warm için White point Red
0..63
49
051
WPGW
( For Warm, White point Red )
Warm için White point Green
0..63
40
052
WPBW
( For Warm, White point Green )
Warm için White point Blue
0..63
25
053
BLRB-YUV
( For Warm, White point Blue )
YUV için Black seviyesi ofset Red – Blue
0..63
32
054
BLG-YUV
( For YUV, Black level offset Red – Blue )
YUV için Black seviyesi ofset Green
0..63
32
055
WPRW-RGB
( For YUV, Black level offset Green )
RGB için White point Red
0..63
32
056
WPGW-RGB
( For RGB, White point Red )
RGB için White point Green
0..63
40
057
WPBW-RGB
( For RGB, White point Green )
RGB için White point Blue
0..63
32
S-No
OSD
041
( For RGB, White point Blue )
Table 7 White ton ayarları ( White tone adjustments )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
058
OSO
Dikey overscan’de Switch-off
ON = Aktif Switch-off
OFF = İn-aktif Switch-off
ON
( Switch-off at vertical overscan )
059
FSL
Dikey sync için Forced Slicing seviyesi
( For vertical sync, Forced Slicing level )
ON = Enable Switch-off
OFF = Disable Switch-off
ON = Sync genliği %60’ı
sabit seviyede bulunan
dikey slicing
OFF = Otomatik dikey
slicing seviyesi
OFF
ON = Vertical slicing level
fixed to 60% of sync
amplitude
OFF = Automatic vertical
slicing level
060
PN8-STB
If option is ON TV can open from stanby
when PIN8 is activated
061
PWL
Peak white sınırlayıcı
062
BPS
( Peak white limiting )
Bypass chroma temel-band
( Bypass chroma base-band )
OFF = feature is not
avaliable
ON = feature is avaliable
0..15
OFF
ON = Bypass temel-band
kroma gecikme çizgisi
OFF = Temel-band
kroma gecikme çizgisi
aktif
OFF
8
ON = Bypass baseband
chroma delay line
OFF = Baseband chroma
delay line active
063
CLPL
Soft kırpma seviyesi
( Soft clipping level )
064
CL
Katot drive seviyesi
065
ST-LMI
( Cathode drive level )
Option for sleep timer last minute
indicator
0
1
2
3
=
=
=
=
PWL‘in 0% üstünde
PWL’in 5% üstünde
PWL’in 10% üstünde
İn-aktif
0
0 = 0% above PWL
1 = 5% above PWL
2 = 10% above PWL
3 = Off
0..15
10
ON = last minute
OFF
indicator appears on TV
OFF = last minute
indicator does not appear
on TV
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
066
DNMENU
Dynamic Menu Mode
ON = Dynamic Menu
Enable
OFF = Dynamic Menu
Disable
OFF
067
UK-EU
IDTV UK veya PAN-EU
OFF = 0 UK
(IDTV UK)
OFF
ON = 1 PAN-EU
(IDTV PAN-EU)
Table 8 Bit Kontrol Servis ayarları ( 8 Bit Control Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
068
FAVI
FAV
ON = Aktif
OFF = İn-aktif
ON
( FAV )
069
BAVI
BAV
( BAV )
070
BSVI
SVHS
( SVHS )
071
SSTDBG
BG ses standardı
( BG sound standard )
072
SSTDI
I ses standardı
( I sound standard )
073
SSTDDK
DK ses standardı
( DK sound standard )
074
SSTDL
L- L prime ses standardı
( L- L prime sound standard )
ON = Active
OFF = In-active
ON = Aktif
OFF = İn-aktif
ON = Active
OFF = In-active
ON = Aktif
OFF = İn-aktif
ON = Active
OFF = In-active
ON = Aktif
OFF = İn-aktif
ON = Active
OFF = In-active
ON = Aktif
OFF = İn-aktif
ON = Active
OFF = In-active
ON = Aktif
OFF = İn-aktif
ON = Active
OFF = In-active
ON = Aktif
OFF = İn-aktif
ON = Active
OFF
OFF
ON
ON
ON
ON
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
OFF = In-active
Table 9 Kaynak seçimi Servis seçenekleri ( Source Switching Service settings)
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
075
TXHPOS
Teletext tek sayfa başlangıç noktası ayarları
0..20
10
076
TXTBRI
( One page Teletext starting point setting )
Teletext parlaklık ayarı
0..63
32
077
TXTCON
( Teletext brightness setting )
Teletext contrast ayarı
0..15
0
078
LSEL1
( Teletext contrast setting )
Menü dili seçimi
0..255
255
079
LSEL2
( Menu language setting )
Menü dili seçimi
0..255
255
080
-------
( Menu language setting )
Table 10 Teletext Servis seçenekleri ( Teletext Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
081
PWPRF
Açılışta görüntü ve sesin gelmesine göre, fast
startup ve perfect startup.
0..15
0 = Fast
15 = Perfect
10
ON = Son duruma
gore açılır
OFF = STANDBY’dan
açılır
ON
082
PWRES
( According to video and sound, when TV
opening, fast startup and perfect startup )
STANDBY’dan açılır.
( Opens from STANDBY. )
ON = Opens
depending on the
last state
OFF = Opens from
STANDBY
Table 11 Güç Servis seçenekleri ( Power Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
083
MAXCOL
084
MAXBRI
085
086
MINBRI
MAXCON
Picture menüsündeki maksimum renk ayar
sınırlayıcısı
(Maximum color setting limiter at Picture menu )
Picture menüsündeki maksimum parlaklık ayar
sınırlayıcısı
(Maximum brightness setting limiter at Picture
menu )
Picture menüsndeki minimum parlaklık ayar
sınırlaması
(Minimum brightness setting limiter at Picture
menu)
Picture menüsündeki maksimum contrast ayar
sınırlayıcısı
0..63
50
0..63
57
0..63
20
0..63
50
(Maximum contrast setting limiter at Picture
menu )
Table 12 Picture Servis seçenekleri ( Picture Service settings )
S-No
OSD
Tanım
( Definition )
Mümkün Ayarlar
Varsayılan Değer
( Default )
087
SAVEFS
Fabrika Servis ayarlarını saklama
OFF
OFF
088
LOADFS
( Saving Factory settings )
Fabrika Servis ayarlarını yükleme
OFF
OFF
089
OAVL
( Loading Factory setting )
Ses menusunde AVL’i optional yapar
0-63
32
0-63
32
0-63
32
0-63
32
0-3
32
(AVL is optional in sound menu)
090
HTLSRC
091
HMAXVOL
092
HDEFVOL
093
RPO
OAVL = 0 (AVL is off and AVL line is not
avaliable in sound menu)
OAVL = 1 (AVL line is avaliable in sound menu)
OAVL = 2 (AVL is on and AVL line is not
avaliable in sound menu)
Other values of OAVL work like OAVL =1
Selection for hotel mode search
HTLSRC = 0 (TV)
HTLSRC = 1 (AV)
HTLSRC = 2 (FAV)
HTLSRC = 3 (SVHS)
HTLSRC > 3 (HOTEL MODE NOT AVAILABLE)
Maximum volume for hotel mode
Volume level definition for hotel mode when tv
is openning
Preover Shoot Ratio
PSYS_RATIO_PRE_OVERSHOOT_MIN =0
PSYS_RATIO_PRE_OVERSHOOT_MAX =3
094
PF
095
APSSND
096
SRCO
Peaking Frequency
PF1-PF0 = 0 (2.7 Mhz)
1 (3.1 Mhz)
2 (3.5 Mhz)
3 (spare)
Default value of sound standard in APS menu
0-> BG
1-> I
2-> DK
3-> L\L’
Control DVD,IDTV, AV2 (Only AK58) sources
0-> DVD, AV2 are OFF
1-> DVD is ON. AV2 is OFF
2-> AV2 is ON. DVD is OFF
3-> DVD, AV2 are ON
0-3
2
0-3
0
0-7
0
Table 13 Fabrika Servis ayarları ( Factory Service settings )
Geometri ayarları : Service menüsündeki 007-011 satırlar arasındaki 50Hz geometri ayarları yapıldıktan sonra, NTSC
offsetlerin belirlenmesi için 016-018 satırlar arasındaki NTSC 60Hz ayarları yapılır. NTSC ayarlarını her tüp çalıması için
bir kez yapılması yeterlidir. Çünkü NTSC ayarları yapılırken, NTSC offset değerleri hesaplanarak EEPROM da saklanır.
16:9 Zoom modu ayarlarıda NTSC ayarları gibi yapılır ve 16:9 offset değerleri hesaplanarak EEPROM’da saklanır. Daha
sonra 50 Hz geometri ayarları değiştirildiğinde, 007-011 veya 016-018 satırlar arasında iken menü tusuna basılarak
geometri ayarları kaydedildiğinde, otomatik olarak 16:9 modu, RGB horizontal shift ve NTSC geometri değerleri
hesaplanır. RGB horizontal shift offset değerleri koda gömülü haldedir. NTSC ve 16:9 modu offset değeri EEPROM’da
saklanmaktadır.
Geometry Adjustment: After adjusting 50Hz geometry items (between 007-011). NTSC 60 Hz geometry items
(between 016-018) should be adjusted to determine NTSC 60Hz offset. NTSC offset is automatically calculated and
stored in NVM. Later on, if we need to change 50Hz geometry settings, NTSC 60Hz geometry settings is automatically
calculated by using NTSC offset. 16:9 mode geometry adjustment works like NTSC 60Hz geometry adjustment.
If press to menu button between 007-011 or 016-018 items. New geometry setting is stored and, 16:9 mode, RGB
shift and NTSC geometry automatically calculated. RGB shift offset value is stored in software. Only NTSC offset and
16:9 mode offset values are stored in EEPROM.
AGC ayarı : Tunere 60db yayın verildikten sonra AGCTO iteminin uzerine gelinip mavi tuşa basıldıgında AGC otomatik
olarak ayarlanır.
AGC adjustment: Connect to tuner 60db broadcast and, press to blue button on AGCTO item. AGC is automatically
adjusted.
Screen Ayarı: Servis menüsünde sarı tuşa basılarak, dikey tarama iptal edilir ve screen ayarının yapılabilmesi için ilgili
registerlar güncellenir. Ekranda ince bir çizgi belirir. Daha sonar bu ince çizgi en ince hale gelene kadar screen
potansiyometrisi ayarlanır. Tekrar sarı tuşa basıldığında eski ayarlar geri yüklenir.
Screen Adjustment: When yellow button is pressed in service menu. Vertical scan is disabled and related registers
are updated. Thin line will be appeared on the screen. Then the screen potentiometer is gently adjusted until the
thin line will be lightly disappeared When press to yellow button again, old register values are reloaded and vertical
scan is enabled.
FOCUS Ayarı : TV de yayın verilir. . FOCUS potansiyometresi en uygun değerede ayarlanır.
FOCUS Adjustment: TV is tuned to the signal. Then focus potantiometer (the upper pot on the rear side of the FBT
transformer) is adjusted for optimum focusing drive.
2.4.
TUNER SETTINGS
Samsung TECC2949PG35B
Alps TEDE9X226A
Alps TEDE9-004A
VHF1-VHF3
Frq. (Mhz)
156,25 MHz
140,25 Mhz
114,25 MHz
170,25 MHz
170,25 MHz
142,25 MHz
149,25 MHz
VHF3-UHF
Frq. (Mhz)
441,25 MHz
431.25 Mhz
401,25 MHz
465,25 MHz
449,25 MHz
425,25 MHz
424,25 MHz
142,25 MHz
425,25 MHz
011
082
Samsung TECC2949PS40B
142,25 MHz
425,25 MHz
011
082
Philips UV1316S MK3
LG TAEW-G002D
Thomson CTT5020
AK56 SERVICE MENU ITEMS
B1-H
B1-L
B2-H
012
050
030
011
050
029
009
146
027
013
018
031
013
018
030
011
082
029
011
194
028
B2-L
02
098
130
130
130
002
242
BS1
001
001
003
001
001
001
001
BS2
002
002
006
002
002
002
002
BS3
004
008
133
004
008
008
008
CB
142
142
142
142
142
142
142
029
002
001
002
008
142
029
002
001
002
008
142
Explanations
B1H
B1L
B2H
B2L
BS1
BS2
BS3
CB
High byte of VHF1-VHF3 cross-over frequency
Low byte of VHF1-VHF3 cross-over frequency
High byte of VHF3-UHF cross-over frequency
Low byte of VHF3-UHF cross-over frequency
Band switching byte for VHF1
Band switching byte for VHF3
Band switching byte for UHF
Control byte
According to Reference Divider 62.5 Khz apply the following formula
Value = ( Frequency (Mhz) * 1000 ) / ( 62.5 ) + 622 ;
Binary_value ( 2 bytes ) = ToBinary( value );
x can be 1 or 2
Bx-H = MSByte( Binary_value ); ( most significant byte )
Bx-L = LSByte( Binary_value ); ( least significant byte )

MT1389E - Page de test

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