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P5 Evolution: Pentium MMX
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Pentium P5 with MMX Extensions
Introduced: 01/1997
Data bus: 64bit Address bus: 32bit
Vcc: 1.8V-2.8V
66-266MHz
L1-caches: 16kB code and data (write-back). 4way set associative.
4.5M transistors. 0.25/0.35 m BiCMOS.
321-pin socket 7
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P5 Evolution: Pentium MMX
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MMX
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MMX = Multi-media Extensions
To meet growing importance and increasing demands of multimedia and communication applications
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57 new instructions
New instructions designed specifically to handle video and audio
data
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SIMD = Single Instruction Multiple Data
One instruction performs the same function on many pieces of
data
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MMX is pipelined
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6th Gen. Processor: P6
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P6 Processor Variations:
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Pentium Pro
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Pentium II
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Pentium II Xeon
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Celeron
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Celeron-A
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Pentium III
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Pentium III Xeon
Original P6 processor. L2 cache: 256kB, 512kB or 1MB (full-core speed)
P6 with L2-cache: 512kB (half-core speed)
P6 with L2-cache: 512kB/1MB/2MB (full-core speed)
P6 without L2 cache
P6 with L2-cache: 128kB on-die (full-core speed)
P6 with SSE (MMX2), L2-cache: 256kB on-die (half-core speed)
P6 with SSE (MMX2), L2-cache: 512kB/1MB/2MB on-die (full-core speed)
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P6: New Features...
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Dual Independent Bus (DIB):
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Two Separate Data Buses:
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One system bus (motherboard…)
One cache bus
Also called: “back-side bus” to the processor
Advantage: Speed of the cache is scalable to the
processor.
In contrast: P5… Cache-speed = motherboard-speed.
P6 processors: >1GHz
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P6: Pentium Pro
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Introduced: 11/1995
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Outstanding feature:
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2 silicon dies:
(before P5 MMX)
Integrated L2 cache
Processor & L2 cache (256kB,
512kB, 1MB)
5.5M + 63M = 68M transistors
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P6: Pentium II
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Introduced: 05/1997
Abandoned: chip-in-a-socket
Introduced: 242-pin SEC cartridge
Much less expensive to manufacture
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P6: Pentium II
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Processor core speeds: 233-450MHz
Bus speeds: 66-100MHz
7.5M transistors. 0.25/0.35 m BiCMOS.
MMX
Power dissipation up to >40W!
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Address-bus: 36bit
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L2 cache
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Heatsinks and fans required!
Addressable: 64GB
Half core-speed.
Supports up to 512MB
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P6: Celeron
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L2 cache support up to 4GB of RAM
MMX
L1 cache: 2* 16kB
Integral thermal diode for temperature
monitoring
0.25/0.18 m technology
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P6: Pentium III
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Introduced: 02/1999
28M transistors
0.18 m coppermine technology
Major improvements:
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SSE (Streaming SIMD Extensions)
Integrated on-die L2 cache
Available up to 1GHz
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7th Gen. Processor: Pentium 4
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Introduced: 11/2000. Also called “NetBurst”
Main technical details:
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Core speed range 1.3GHz..3GHz…?
42M transistors. 0.18 m.
System (front-side) bus: up to 400MHz
ALU runs at twice the processor core frequency
Hyper-pipelined 20-stage technology
Very deep out-of-order instruction execution
20kB L1 cache. 256kB full-speed L2-cache. 8-way set
associative. L2 supports up to 4GB RAM and ECC.
SSE2 – 144 new SSE2 instructions
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Paketlenmiş
L2 Ön_bellek
Komut
Ön belleği
Sıralı işlem
Veriyolu Bağdaştırma Birimi
Sonraki_IP
BTB
L1 Komut
Ön_belleği
Algetir
Algetir
Kod Çözme
Birimi X3
Sıralı
işlem
MIS
L1 Veri
Ön_belleği
Algetir/
Kod çözme
Birimi
sakla
yükle
Sevketme/
İcra Birimi
İnziva
Birimi
RAT
Komut Havuzu
(ROB)
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With a single processor system, the processor can normally read a
single instruction into the execution core per “clock
cycle”. However, many instructions take more than a single clock cycle to
execute due to something called memory latency, for example a “load”
instruction must read data
from memory which can take many clock cycles to arrive at the
processor. The result is that a lot of time the processor is idle.
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Hyper-threading is an Intel technology that enables the processor
to execute alternative instructions when it would normally be idle. It
is still a single processor but the processor presents itself as two
logical processors to
allow the operating system to schedule separate “threads” of
instructions for execution on each logical processor.
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A multi-core processor also presents itself as two logical processors to
the operating system. However, this time there really are two execution
cores on the processor. These two cores can execute separate “threads” of
instructions in a truly simultaneous fashion but they are located on a single
processor die and therefore use up less space. Unlike a situation where
there are two processors in a system, the two execution cores share the
some of the same cache which can be very helpful if the two threads of
execution are executing the same instructions and if they are working on
the same set of data.
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A multi-core processor (or chip-level multiprocessor, CMP) combines
two or more independent cores (normally a CPU) into a single package
composed of a single integrated circuit (IC), called a die, or more dies
packaged together. A dual-core processor contains two cores, and a quadcore processor contains four cores. A multi-core microprocessor implements
multiprocessing in a single physical package.
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Chipset
–İşlemci türünü belirler
–RAMtürünü ve kapasitesini belirler
–Anakartın desteklediği takılabilecek iç ve dış aygıtları belirler
–CPU, RAM veG/Çaygıtları arasında elektronik ara yüz olarak
görev yapar
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•Northbridge
–CPU – RAM arasındaki iletişimi sağlamaktadır.
–Yeni AMD sistemlerinde video için de kullanılmaktadır.
•Southbridge
–Ek aygıtlar ve depolama aygıtlar
–Genişleme yuvaları, EIDE ve FDD controller
–I/O Controller Hub ,ICH5(G/Ç Denetim Merkezi) yada peripheral
bus controller(dış veri yolu denetleyici)
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Intel based mainboard
–Northbridge için Memory controller hub
,MCH(Bellek Denetim Merkezi) ,
–Southbridge için I/O controller hub, ICH, (G/Ç
Denetim Merkezi)
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There are several suppliers of chip sets for the motherboard:
· Intel
· SIS
· Opti
· Via
· ALi
Triton first and second
The interest in chip sets and their performance started in
late 1995, when the Pentium processor became more
popular. The Triton controllers were the first chip sets in
this trend.
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82430FX from late 1995 was Intel's next chip set and
the first Triton.
In February 1996 the second generation of Triton
arrived.
Two new chip sets were introduced: The 82430VX and
82430HX. The last (HX) was the fastest one.
VX and HX
The two sets were similar, yet different.
430HX consisted of two chips. It was designed for the
more professional PCs.
430VX consisted of four chips, but the cost was slightly
lower than HX. It was aimed at the home use PC
market.
Chip set
Contents
82430HX
82439HX System Controller (TXC)
+ 82371SB PCI ISA IDE Accelerator
82430VX
82437VX System Controller (TVX)
+ two 82438VX Data Path Units (TDX)
+ 82371SB PCI ISA IDE Accelerator
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Intel TX chip set
The last chip set to Pentium processors were named 82430TX,
which supports two new hot technologies:
· SD-RAM
· Ultra DMA
TX firstly supports SD RAM and Ultra DMA hard disks. Two
important technologies. But the TX-set cannot cache above 64 MB
RAM.
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VIA Apollo MVP3
This chip set for Socket 7 motherboards promises very good
performance with its 100 MHz bus connecting the CPU with the L2
cache and possible PC100 SDRAM. Other features include:
· AGP graphics
· Supports up to 1 GB RAM in 64 Mbit FPM/EDO/SDRAM/PC100
modules
· 2 MB L2 cache support
· Virtual Clock Synchronization (VCS) for optimal timing.
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Ali Aladdin 5
This Aladdin V chip set is for modern Socket 7 CPUs like AMD K6-2
running up to 350 MHz with a 100 MHz system bus.
It consists of two chips, a north and a south bridge. There features
are:
· M1541(AGP, CPU-to-PCI Bridge, Memory Cache & Buffer Controller)
· Interface for all socket 7 compatible processors
· High performance FPM/EDO/SDRAM DRAM controller
· 2-channel dedicated Ultra-33 IDE Master controller
· 2-port USB controller, SMBus controller, PS/2 Keyboard/Mouse controller
· Super I/O (Floppy Disk Controller, 2 serial port/1 parallel port) support.
· Two full function universal asynchronous receiver/ transmitters (UARTs), a
flexible high performance internal data separator with send/receive 16 byte
FIFOs.
· Serial Infra Red for wireless communications with other devices.
· Swap drives A & B.
· SPP, PS/2, EPP and ECP parallel port.
· 328-pin BGA
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82450GX
This chip set came out in 1995, It is supporting quad CPU
configurations. That is PCs with 4 Pentium Pros.
82440FX - Natoma
This was for a long time Intel's most widely used chip set
for 6th. generation CPUs. This chip set can handle 2
CPUs on the same motherboard.
440FX consists of four controllers.
Common for these chip sets
is the 82371SB PCI-ISA accelerator,
which provides good
performance on the I/O
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Intel 810
· A new type of memory controller with built-in graphics
technology.
· Support for up to 512 MB SDRAM.
· Built-in audio-codec controller.
· No ISA bus!
82810
Graphics Memory Controller Hub
82801
Integrated Controller Hub
82802
Firmware Hub
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Graphics Memory Controller Hub
The 82810 Graphics Memory Controller Hub (GMCH) is a MCH "north
bridge" including a graphics controller and using Direct AGP (integrated
AGP, where the graphics controller is directly connected to the system
RAM) operating at 100 MHz.
82801 I/O Controller Hub
This "south bridge", the 82801 (ICH), employs an accelerated hub
to give a direct connection from the graphics and memory to the
integrated AC97 (Audio-Codec) controller, the IDE controllers, the
dual USB ports, and the PCI bus. This promises increased I/O
performance.
82802 Firmware Hub (FWH)
The 82802 Firmware Hub (FWH) stores system BIOS and video
BIOS in a 4 Mbit EEPROM.
AC97
The Integrated Audio-Codec 97 controller enables software audio
and modem by using the processor to run sound and modem
software.
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820e
In June 2000 Intel's revamped i820E chipset started
shipping.
Featuring a brand new ICH2 I/O controller hub (i82801BA),
the new chip set holds:
· Four USB ports using dual controllers
· Integrated LAN controller
· Dual Ultra ATA/100 IDE controllers
· Dolby surround-capable six-channel audio.
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Referanslar:
Butler, T., 2004, Pentium Generations: A History and Technical Overview of Intel’s Pentium Processors
http://www.karbosguide.com/hardware
http://ww.intel.com
http://www.amd.com
http://en.wikipedia.org/wiki/Hyper-threading
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